[Pdbg] [PATCH v2] WIP: POWER8 SRESET

[Stewart Smith]

Alistair Popple <alistair at popple.id.au> writes:
> SRESET on POWER8 is made more complex because it can only be run if a
> thread is in a powersave state. This makes getting an active thread
> into SRESET hard because we need to emulate what the processor does
> using instruction ramming.

The pure SRESET part can also be had with fast-reboot, see
https://github.com/open-power/op-test-framework/pull/437 for pretty
reproducible test case (I upped to 120 seconds most recently, and that
hits it within a couple of iterations pretty reliably).

Next up for today is to resurrect the instruction ramming in skiboot and
see if I make things better there.

Looks like we have exactly the same problem in two places :)

-- 
Stewart Smith
OPAL Architect, IBM.