[Pdbg] [PATCH 0/7] work in progress series for P8 sreset

Nicholas Piggin npiggin at gmail.com
Fri Mar 8 13:25:32 AEDT 2019


This is a bunch of fixes and changes to try to get P8 sreset working.
So far some progress

  / # taskset 1 yes > /dev/null
  cpu 0x0: Vector: 100 (System Reset) at [c0000003ff6a7d80]
      pc: 00007fff9301b574
      lr: 00007fff92fbcde0
      sp: 7fffcad416b0
     msr: 900000000000f033
    current = 0xc0000003f9fb4400
    paca    = 0xc0000003ff7ff480	 irqmask: 0x03	 irq_happened: 0x01
      pid   = 1651, comm = yes
  Linux version 4.19.13-openpower1 (jenkins at blade4a) (gcc version 6.4.0 (Buildroot 2018.11.1-00007-g5d7cc8c)) #2 SMP Thu Jan 17 05:23:00 UTC 2019
  enter ? for help
  SP (7fffcad416b0) is in userspace
  0:mon> c
  cpus stopped: 0x0-0x1f
  0:mon> x
  / #


Nicholas Piggin (7):
  libpdbg: Fix CHECK_ERR macro to evaluate once in error case
  libpdbg/p8chip.c: read status from correct target
  libpdbg/p8chip.c: Only write the SP_STOP bit once
  libpdbg/p8chip.c: release special wakeups for P8
  libpdbg: use MTMSRD opcode rather than MTMSR
  libpdbg/p8chip.c: ram state setup sequence match workbook
  libpdbg/p8chip.c: Emulate sreset using ramming for active threads

 libpdbg/operations.h |   7 +-
 libpdbg/p8chip.c     | 192 +++++++++++++++++++++++++++++++++----------
 2 files changed, 151 insertions(+), 48 deletions(-)

-- 
2.20.1



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