[Pdbg] [PATCH 01/10] libpdbg/p9chip.c: disable ramming LSU opcodes

[Alistair Popple]

On Thursday, 3 May 2018 4:26:53 PM AEST Nicholas Piggin wrote:
> These are too easy to cause checkstops, and there's a better
> alternative.
> 
> Signed-off-by: Nicholas Piggin <npiggin at gmail.com>
> ---
>  libpdbg/p9chip.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/libpdbg/p9chip.c b/libpdbg/p9chip.c
> index 97456a8..339d2f0 100644
> --- a/libpdbg/p9chip.c
> +++ b/libpdbg/p9chip.c
> @@ -309,6 +309,11 @@ out:
>  
>  static int p9_ram_instruction(struct thread *thread, uint64_t opcode, uint64_t *scratch)
>  {
> +	if ((opcode & OPCODE_MASK) == LD_OPCODE) {
> +		printf("RAM LSU opcodes are disabled for POWER9 because exceptions will checkstop. Use ADU instead.\n");

On P8 these were used as an easy way to do address translation (EA -> RA) by
getting the core to do the translation as exceptions didn't checkstop. However I
agree we should just disable it on P9 if checkstops cause exceptions. Thanks!

To use the ADU in the same way though we'd need to implement something to walk
the page tables.

> +		return 1;
> +	}
> +
>  	if ((opcode & OPCODE_MASK) == LD_OPCODE) {
>  		/*
>  		 * Loads must be rammed twice, the value of the second used.
>