[OpenPower-Firmware] SRESET and idle CPU
Artem Senichev
a.senichev at yadro.com
Sat Jul 25 03:31:13 AEST 2020
Hi Dan,
Thank you for quick reply!
I tried to use SPECIAL_WKUP_FSP_REG register, but it does not work as expected for me.
Maybe I am using this incorrectly?
# current state
bmc:~ # pdbg -p0 -c0 -t0-3 threadstatus
p0t: 0 1 2 3
c00: .S. .S. .S. .S.
# read SPECIAL_WKUP_FSP_REG
bmc:~ # pdbg -p0 getscom 0x200F010B
p0: 0x00000000200f010b = 0x0000000000000000 (/proc0/pib)
# stop the first thread
bmc:~ # pdbg -p0 -c0 -t0 stop
# SPECIAL_WKUP_FSP_REG has changed
bmc:~ # pdbg -p0 getscom 0x200F010B
p0: 0x00000000200f010b = 0x8000000000000000 (/proc0/pib)
# thread now in quiesced state
bmc:~ # pdbg -p0 -c0 -t0-3 threadstatus
p0t: 0 1 2 3
c00: .SQ .S. .S. .S.
# force set 0 bit (addr value mask)
bmc:~ # pdbg -p0 putscom 0x200F010B 0x8000000000000000 0x8000000000000000
# state still inactive
bmc:~ # pdbg -p0 -c0 -t0-3 threadstatus
p0t: 0 1 2 3
c00: .SQ .S. .S. .S.
# read SPECIAL_WKUP_FSP_REG
bmc:~ # pdbg -p0 getscom 0x200F010B
p0: 0x00000000200f010b = 0x8000000000000000 (/proc0/pib)
# reset 0 bit
bmc:~ # pdbg -p0 putscom 0x200F010B 0 0x8000000000000000
# no quiesced state for now
bmc:~ # pdbg -p0 -c0 -t0-3 threadstatus
p0t: 0 1 2 3
c00: .S. .S. .S. .S.
# read SPECIAL_WKUP_FSP_REG
bmc:~ # pdbg -p0 getscom 0x200F010B
p0: 0x00000000200f010b = 0x0000000000000000 (/proc0/pib)
It looks like 0 bit in SPECIAL_WKUP_FSP_REG takes the thread out of "quiesced" state, but do not set it as active.
If I disable cpuidle on the host, I see something like this (which is what I expect):
bmc:~ # pdbg -p0 -c0 -t0-3 threadstatus
p0t: 0 1 2 3
c00: A.. .S. .S. .S.
--
Regards,
Artem Senichev
Software Engineer, YADRO.
________________________________________
From: Daniel M Crowell <dcrowell at us.ibm.com>
Sent: 24 July 2020 18:04
To: Artem Senichev
Cc: openpower-firmware at lists.ozlabs.org
Subject: Re: [OpenPower-Firmware] SRESET and idle CPU
I think that you might be able to initiate a 'special wakeup' via scom from the BMC. I'm a little surprised that pdbg doesn't have that built in to the stop function already like we do in some similar tooling (but I have no visibility to pdbg's goals). Enabling special wakeup forces a core to exit the idle state and prevents it from going idle. Instructions aren't executed, but pervasively the core is alive. That should allow the scoms to trigger stop/sreset/etc to work.
For P9 there are 3 sets of wakeup registers, each with a different owner:
- 200F010A = SPECIAL_WKUP_OTR_REG - Used by the PM Complex itself internally
- 200F010B = SPECIAL_WKUP_FSP_REG - Used by FSP when we have one, or by HBRT/opal-prd on these boxes
- 200F010C = SPECIAL_WKUP_OCC_REG - Used by OCC
- 200F010D = SPECIAL_WKUP_HYP_REG - Used by OPAL/PHYP
I would recommend that you use 200F010B for this purpose. You just need to set bit 0 to trigger it, though there is a non-zero time for it to take effect. See https://github.com/open-power/hostboot/blob/master/src/import/chips/p9/procedures/hwp/pm/p9_cpu_special_wakeup.C for the details.
You'll need to set it on every functional core. You could probably get fancy and use multicasts to do it with a single scom using group 1. And don't forget to clear it later so that you can use idle states again later.
--
Dan Crowell
Senior Software Engineer - Power Systems Enablement Firmware
IBM Rochester: t/l 553-2987
dcrowell at us.ibm.com
[Inactive hide details for Artem Senichev ---07/24/2020 07:03:58 AM---Hi all, Our customers want to be able to initiate kdump on]Artem Senichev ---07/24/2020 07:03:58 AM---Hi all, Our customers want to be able to initiate kdump on a POWER9 host system from BMC console.
From: Artem Senichev <a.senichev at yadro.com>
To: "openpower-firmware at lists.ozlabs.org" <openpower-firmware at lists.ozlabs.org>
Date: 07/24/2020 07:03 AM
Subject: [EXTERNAL] [OpenPower-Firmware] SRESET and idle CPU
Sent by: "OpenPower-Firmware" <openpower-firmware-bounces+dcrowell=us.ibm.com at lists.ozlabs.org>
________________________________
Hi all,
Our customers want to be able to initiate kdump on a POWER9 host system from BMC console.
I tried to implement this functionality with an SRESET signal sent through the pdbg utility, but it turned out that when the CPU is in an idle state (sleep), the signal could not be delivered.
I can disable the idle state on a host:
for i in /sys/devices/system/cpu/cpu0/cpuidle/state*/disable; do
echo 1 > $i
done
and then send SRESET from BMC:
pdbg -p0 -c0 -t0 stop
pdbg -p0 -c0 -t0 sreset
This solution works fine, but I need to do it without interfering with the host system.
Is it possible?
--
Regards,
Artem Senichev
Software Engineer, YADRO.
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