[OpenPower-Firmware] SRESET and idle CPU

Daniel M Crowell dcrowell at us.ibm.com
Sat Jul 25 01:04:06 AEST 2020


I think that you might be able to initiate a 'special wakeup' via scom from
the BMC.  I'm a little surprised that pdbg doesn't have that built in to
the stop function already like we do in some similar tooling (but I have no
visibility to pdbg's goals).  Enabling special wakeup forces a core to exit
the idle state and prevents it from going idle.  Instructions aren't
executed, but pervasively the core is alive.  That should allow the scoms
to trigger stop/sreset/etc to work.

For P9 there are 3 sets of wakeup registers, each with a different owner:
- 200F010A = SPECIAL_WKUP_OTR_REG - Used by the PM Complex itself
internally
- 200F010B = SPECIAL_WKUP_FSP_REG - Used by FSP when we have one, or by
HBRT/opal-prd on these boxes
- 200F010C = SPECIAL_WKUP_OCC_REG - Used by OCC
- 200F010D = SPECIAL_WKUP_HYP_REG - Used by OPAL/PHYP

I would recommend that you use 200F010B for this purpose.  You just need to
set bit 0 to trigger it, though there is a non-zero time for it to take
effect.  See
https://github.com/open-power/hostboot/blob/master/src/import/chips/p9/procedures/hwp/pm/p9_cpu_special_wakeup.C
 for the details.

You'll need to set it on every functional core.  You could probably get
fancy and use multicasts to do it with a single scom using group 1.  And
don't forget to clear it later so that you can use idle states again later.

--
Dan Crowell
Senior Software Engineer - Power Systems Enablement Firmware
IBM Rochester: t/l 553-2987
dcrowell at us.ibm.com



From:	Artem Senichev <a.senichev at yadro.com>
To:	"openpower-firmware at lists.ozlabs.org"
            <openpower-firmware at lists.ozlabs.org>
Date:	07/24/2020 07:03 AM
Subject:	[EXTERNAL] [OpenPower-Firmware] SRESET and idle CPU
Sent by:	"OpenPower-Firmware" <openpower-firmware-bounces
            +dcrowell=us.ibm.com at lists.ozlabs.org>



Hi all,

Our customers want to be able to initiate kdump on a POWER9 host system
from BMC console.
I tried to implement this functionality with an SRESET signal sent through
the pdbg utility, but it turned out that when the CPU is in an idle state
(sleep), the signal could not be delivered.

I can disable the idle state on a host:

for i in /sys/devices/system/cpu/cpu0/cpuidle/state*/disable; do
  echo 1 > $i
done

and then send SRESET from BMC:

pdbg -p0 -c0 -t0 stop
pdbg -p0 -c0 -t0 sreset

This solution works fine, but I need to do it without interfering with the
host system.
Is it possible?

--
Regards,
Artem Senichev
Software Engineer, YADRO.

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