[OpenPower-Firmware] A few questions about early hostboot

[Dean Sanner]

> > This is the output from Cronus when Hostboot is running:
> > p9n.c   k0:n0:s0:p00:c2    0000000000000000: 686F7374 626F6F74
[hostboot]
> >
> Ok cool. This returns 'starthbb' at the point I was at. Question, is
> there some way to translate MMIO_SCRATCH_HOSTBOOT_ACTIVE = 0x18 to that
> scom address, or is it one of those things you 'just know' from a table
> or something?

Little of both :(  Technically it used to be documented in the Chip
Pervasive
spec -- however I couldn't find it in P8 or P9 pervasive specs.

The scom def however has just enough information to piece it together:

>From src/kernel/misc.C, updateScratchReg:

// See EX07.EC.CC.PCC0.COMMON.SPR_COMMON.SCOMC in scomdef for
// info on this offset - MODE_CX_SCOMC: 0000xxx = SCRATCH xx SPR
// It's 0 for P9 so just pass through scratch reg offset

>From the scomdef:
                                                        
 Addr:  0000000020010A80 (SCOM)                         
                                                        
 Name:  EXP.EC.CC.PCC0.COMMON.SPR_COMMON.SCOMC          
                                                        


Bits 54:60
	MODE_CX_SCOMC:
	0000xxx = SCRATCH xx SPR   <-------------- This one
	0001xxx = TFMR xx SPR
	0010xxx = PURR xx SPR
	0011xxx = SPURR xx SPR
	0100xxx = DEC xx SPR
	0111000 = SPR_MODE
	0111001 = AVP Output Pin
	0111010 = Core Checkstop req
	0111011 = SPATTN SPR
	0111100 = Core Thread State
	1xxxxxx = Emmpath Counters

The Scomdef "Scratch Register 0" has the SPRD value of:
Scratch Register 0  == 0000000020000000 (SPRD)
Scratch Register 1  == 0000000020000001 (SPRD)
Scratch Register 2  == 0000000020000002 (SPRD)
Scratch Register 3  == 0000000020000003 (SPRD)

The scratch reg constants are 0x0, 0x8, 0x10, 0x18 and in BE
that is counting bit 59:60 through 0, 1, 2, 3:

          1         2         3         4         5         6
0123456789012345678901234567890123456789012345678901234567890123
0000000000000000000000000000000000000000000000000000000000011000
0   0   0   0   0   0   0   0   0   0   0   0   0   0   1   8


So what is happening is the scratch reg number is being set into
SPRC bits 54:60, which correlates to the 0000xxx, which ties to
the SPRD value in the scomdef.


Absolutely crystal clear -- not!  :(

Does that make sense?

Dean Sanner
dsanner at us.ibm.com
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