<html><body><p><tt><font size="2">> > This is the output from Cronus when Hostboot is running:<br>> > p9n.c k0:n0:s0:p00:c2 0000000000000000: 686F7374 626F6F74 [hostboot]<br>> > <br>> Ok cool. This returns 'starthbb' at the point I was at. Question, is<br>> there some way to translate MMIO_SCRATCH_HOSTBOOT_ACTIVE = 0x18 to that<br>> scom address, or is it one of those things you 'just know' from a table<br>> or something?<br></font></tt><br><tt><font size="2">Little of both :( Technically it used to be documented in the Chip Pervasive </font></tt><br><tt><font size="2">spec -- however I couldn't find it in P8 or P9 pervasive specs.</font></tt><br><br><tt><font size="2">The scom def however has just enough information to piece it together:</font></tt><br><br><tt><font size="2">From src/kernel/misc.C, </font></tt><tt><font size="2">updateScratchReg:</font></tt><br><br><tt><font size="2">// See EX07.EC.CC.PCC0.COMMON.SPR_COMMON.SCOMC in scomdef for</font></tt><br><tt><font size="2">// info on this offset - MODE_CX_SCOMC: 0000xxx = SCRATCH xx SPR</font></tt><br><tt><font size="2">// It's 0 for P9 so just pass through scratch reg offset</font></tt><br><br><tt><font size="2">From the scomdef:</font></tt><br><br>
<table class="scomtable" border="0" cellspacing="0" cellpadding="0"><tr valign="top"><td width="46" bgcolor="#FFFFFF" valign="middle"><div align="center"><b>Addr:</b></div></td><td width="378" bgcolor="#FFFFFF" valign="middle">0000000020010A80 (SCOM)</td></tr>
<tr valign="top"><td width="46" bgcolor="#FFFFFF" valign="middle"><div align="center"><b>Name:</b></div></td><td width="378" bgcolor="#FFFFFF" valign="middle">EXP.EC.CC.PCC0.COMMON.SPR_COMMON.SCOMC</td></tr></table><font size="2">Bits 54:60</font> <br><font size="2"> MODE_CX_SCOMC:</font><br><font size="2"> 0000xxx = SCRATCH xx SPR <-------------- This one<br> 0001xxx = TFMR xx SPR <br> 0010xxx = PURR xx SPR <br> 0011xxx = SPURR xx SPR <br> 0100xxx = DEC xx SPR <br> 0111000 = SPR_MODE <br> 0111001 = AVP Output Pin <br> 0111010 = Core Checkstop req <br> 0111011 = SPATTN SPR <br> 0111100 = Core Thread State <br> 1xxxxxx = Emmpath Counters </font><br><br><tt><font size="2">The Scomdef "</font></tt>Scratch Register 0" has the SPRD value of:<br>Scratch Register 0 == 0000000020000000 (SPRD) <br>Scratch Register 1 == 0000000020000001 (SPRD) <br>Scratch Register 2 == 0000000020000002 (SPRD) <br>Scratch Register 3 == 0000000020000003 (SPRD) <br><br><tt><font size="2">The scratch reg constants are 0x0, 0x8, 0x10, 0x18 and in BE</font></tt><br><tt><font size="2">that is counting bit 59:60 through 0, 1, 2, 3:</font></tt><br><br><tt><font size="2"> 1 2 3 4 5 6</font></tt><br><tt><font size="2">0123456789012345678901234567890123456789012345678901234567890123</font></tt><br><tt><font size="2">0000000000000000000000000000000000000000000000000000000000011000</font></tt><br><tt><font size="2">0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 8</font></tt><br><br><br><tt><font size="2">So what is happening is the scratch reg number is being set into </font></tt><br><tt><font size="2">SPRC bits 54:60, which correlates to the 0000xxx, which ties to</font></tt><br><tt><font size="2">the SPRD value in the scomdef.</font></tt><br><br><br><tt><font size="2">Absolutely crystal clear -- not! :(</font></tt><br><br><tt><font size="2">Does that make sense?</font></tt><br><br><font size="2">Dean Sanner<br>dsanner@us.ibm.com<br></font><BR>
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