[OpenPower-Firmware] Hardware documentation

Marty E. Plummer hanetzer at startmail.com
Sat Oct 26 23:50:43 AEDT 2019


On Thu, Oct 17, 2019 at 06:16:24PM +1100, Andrew Donnellan wrote:
> On 15/10/19 9:55 am, Marty E. Plummer wrote:
> > > On Mon, Oct 14, 2019 at 01:34:07AM +0000, Daniel M Crowell wrote:
> > > > think a goodly portion of it is directly executed (but I seem to recall
> > > > reading that some of it just calls to the bits of hostboot still in
> > > > memory after it gets loaded, pinged Stewart Smith about that).
> > > There isn't anything in skiboot that requires any hostboot logic to be resident.
> > Maybe I'm thinking of the linux kernel drivers then.
> 
> Yep, you're thinking of the PRD diagnostics which call into HBRT (HostBoot
> RunTime). You can do without it though.
> 
Ah yep, that was it.

On another note, address spaces. In coreboot terminology bootblock and
romstage will run out of the cache, and romstage will init the ram
enough to load ramstage into it. One thing I'm wondering about is the
layout of memory in these stages (analogous to hbibl and hbicore or so).

Does it start at 0x0 or some other location? (both cache for early boot
and 'normal' dram)
> 
> -- 
> Andrew Donnellan              OzLabs, ADL Canberra
> ajd at linux.ibm.com             IBM Australia Limited
> 


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