eMMC ABR behavior

[Chin-Ting Kuo]

Hi Joel,

If you want to trigger WDT SoC reset, namely, warm reboot, and boot from boot0 partition, SECA0[4] should be cleared by writing 0xEA to SECA0[23:16].
Remember to unlock sec register by controlling SEC00 register.



Thanks.

Best Wishes,
Chin-Ting

> -----Original Message-----
> From: Joel Stanley <joel at jms.id.au>
> Sent: Wednesday, May 25, 2022 8:51 AM
> To: Ryan Chen <ryan_chen at aspeedtech.com>
> Cc: OpenBMC Maillist <openbmc at lists.ozlabs.org>
> Subject: eMMC ABR behavior
> 
> Hello Ryan,
> 
> We are testing eMMC ABR by corrupting the u-boot image. When the eMMC
> ABR mode kicks in, we then boot as expected from the boot1 image. We then
> restore the working boot0 image, and reboot the system, which still boots into
> boot1. In order to boot from boot0 again we must power cycle the system.
> 
> I see two scenarios:
> 
> 1. This is expected. The BMC software is expected to recognise that the ABR
> mode switch has occurred, and based on policy, configure the ABR to go back
> to boot0 or raise an error.
> 
> 2. This is unexpected. The BMC should always try that boot0 image on each
> boot, from both a software reset or a power on reset. We should add code to
> the kernel watchdog driver to ensure the ABR mode is reset before system
> reboots.
> 
> Cheers,
> 
> Joel