Aspeed SPI driver upstreaming

[Patrick Williams]

On Mon, May 16, 2022 at 02:18:24PM -0400, Brad Bishop wrote:
> Hi Patrick
> 
> On Thu, Jan 09, 2020 at 10:43:17AM -0600, Patrick Williams wrote:
> >It looks like this patch set is still the MTD-only implementation, which
> >is useful for SPI-NOR chips but not useful for non-flash devices such as
> >TPMs.  Is there any work or thought into how we could do a generic SPI
> >controller and then layer the MTD above it?
> 
> I wonder if it is "just" a matter of implementing one of the low level 
> controller methods described here:
> https://www.kernel.org/doc/html/latest/spi/spi-summary.html?highlight=spi#spi-master-methods
> along side the spi-mem callbacks...

I don't know the details here.  There was some dispute between the MTD
maintainers and work that others were doing in this area that has made
it difficult for us to get additional patches in until someone refactors
the Aspeed driver how upstream wants.  (last I was aware)

> >We have some system designs where we have both a NOR device and a TPM on
> >the same SPI bus.  What we're currently doing is using the
> >(non-upstream) aspeed-spi driver which lets us use both the TPM and
> >MTD/SPI-NOR driver, but since it doesn't have the calibration routines
> >the SPI-NOR runs at a slower speed than optimal.
> 
> Are you still using the aspeed-spi driver?  Have you had any issues with 
> using it?

I am not using the aspeed-spi driver in these conditions.  After
initially setting this up we did some testing with the TPM driver and
realized that it wasn't working.  It turns out that the Aspeed hardware
is incapable of bi-directional transactions (bytes going out MOSI and in
MISO at the same time), which is required by the TCG TPM protocol.
We've ended up having to use the GPIO-SPI bitbang driver for talking
with SPI-based TPMs.

-- 
Patrick Williams
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