[PATCH U-Boot v2019.04-aspeed-openbmc 6/6] ast2600: Add GPIO controller and hog TPM reset pin
Eddie James
eajames at linux.ibm.com
Tue Feb 8 02:27:06 AEDT 2022
On 2/3/22 16:12, Andrew Jeffery wrote:
>
> On Fri, 4 Feb 2022, at 02:31, Eddie James wrote:
>> On 2/2/22 20:17, Andrew Jeffery wrote:
>>> On Tue, 25 Jan 2022, at 05:45, Eddie James wrote:
>>>> Hog the GPIO pin to reset the TPM.
>>>>
>>>> Signed-off-by: Eddie James <eajames at linux.ibm.com>
>>>> ---
>>>> arch/arm/dts/ast2600-rainier.dts | 11 +++++++++++
>>>> 1 file changed, 11 insertions(+)
>>>>
>>>> diff --git a/arch/arm/dts/ast2600-rainier.dts b/arch/arm/dts/ast2600-rainier.dts
>>>> index aae507b4c2..d0e82d1512 100755
>>>> --- a/arch/arm/dts/ast2600-rainier.dts
>>>> +++ b/arch/arm/dts/ast2600-rainier.dts
>>>> @@ -108,3 +108,14 @@
>>>> u-boot,dm-pre-reloc;
>>>> status = "okay";
>>>> };
>>>> +
>>>> +&gpio0 {
>>>> + u-boot,dm-pre-reloc;
>>>> +
>>>> + tpm_reset {
>>>> + u-boot,dm-pre-reloc;
>>> Do we need this in the hog node? Seems like it's only necessary in controller nodes.
>>
>> Yes it is necessary, the SPL dtc compiler will cull anything without
>> that property.
> Are you sure it's done at dts translation time?
>
> My understanding is the driver model core will only instantiate drivers
> for devices with the property. This suggests all nodes are retained.
>
> I used uclass_get_device_by_driver() in the mach-aspeed patch which
> will forcibly probe the driver.
Well, I can use fdtdump and compare the outputs. It looks to me like the
node wouldn't be in the SPL dts at all without that property, unless
fdtdump simply isn't detecting it in that case for some reason.
With the property:
$ fdtdump spl/u-boot-spl.dtb
**** fdtdump is a low-level debugging tool, not meant for general use.
**** If you want to decompile a dtb, you probably want
**** dtc -I dtb -O dts <filename>
/dts-v1/;
// magic: 0xd00dfeed
// totalsize: 0xa46 (2630)
// off_dt_struct: 0x38
// off_dt_strings: 0x8b0
// off_mem_rsvmap: 0x28
// version: 17
// last_comp_version: 2
// boot_cpuid_phys: 0x0
// size_dt_strings: 0x196
// size_dt_struct: 0x878
/ {
#address-cells = <0x00000001>;
#size-cells = <0x00000001>;
model = Rainier;
compatible = ibm,rainier-bmc, aspeed,ast2600;
chosen {
stdout-path = /ahb/apb/serial at 1e784000;
};
aliases {
serial4 = /ahb/apb/serial at 1e784000;
mmc0 = /ahb/apb/emmc at 1e750000/emmc_slot0 at 100;
};
ahb {
compatible = simple-bus;
#address-cells = <0x00000001>;
#size-cells = <0x00000001>;
device_type = soc;
ranges;
u-boot,dm-pre-reloc;
apb {
compatible = simple-bus;
#address-cells = <0x00000001>;
#size-cells = <0x00000001>;
ranges;
u-boot,dm-pre-reloc;
hace at 1e6d0000 {
compatible = aspeed,ast2600-hace;
reg = <0x1e6d0000 0x00000200>;
interrupts = <0x00000000 0x00000004 0x00000004>;
clocks = <0x00000002 0x00000007>;
clock-names = yclk;
status = okay;
u-boot,dm-pre-reloc;
};
emmc at 1e750000 {
#interrupt-cells = <0x00000001>;
compatible = aspeed,aspeed-emmc-irq, simple-mfd;
reg = <0x1e750000 0x00001000>;
interrupts = <0x00000000 0x0000000f 0x00000004>;
interrupt-controller;
clocks = <0x00000002 0x0000001f 0x00000002 0x00000020>;
clock-names = ctrlclk, extclk;
#address-cells = <0x00000001>;
#size-cells = <0x00000001>;
ranges = <0x00000000 0x1e750000 0x00001000>;
u-boot,dm-pre-reloc;
timing-phase = <0x000700ff>;
phandle = <0x00000012>;
emmc_slot0 at 100 {
compatible = aspeed,emmc-ast2600;
reg = <0x00000100 0x00000100>;
interrupts = <0x00000000>;
clocks = <0x00000002 0x00000035>;
status = okay;
u-boot,dm-pre-reloc;
bus-width = <0x00000004>;
sdhci-drive-type = <0x00000001>;
};
};
gpio at 1e780000 {
compatible = aspeed,ast2600-gpio;
reg = <0x1e780000 0x00000400>;
interrupts = <0x00000000 0x00000028 0x00000004>;
#gpio-cells = <0x00000002>;
gpio-controller;
interrupt-controller;
gpio-ranges = <0x00000014 0x00000000 0x00000000
0x000000d0>;
ngpios = <0x000000d0>;
u-boot,dm-pre-reloc;
tpm_reset {
u-boot,dm-pre-reloc;
gpio-hog;
output-high;
gpios = <0x00000088 0x00000000>;
};
};
serial at 1e784000 {
compatible = ns16550a;
reg = <0x1e784000 0x00001000>;
reg-shift = <0x00000002>;
interrupts = <0x00000000 0x00000024 0x00000004>;
clocks = <0x00000002 0x0000000f>;
clock-frequency = <0x001c2b8a>;
no-loopback-test;
status = okay;
u-boot,dm-pre-reloc;
};
watchdog at 1e785040 {
compatible = aspeed,ast2600-wdt;
reg = <0x1e785040 0x00000040>;
u-boot,dm-pre-reloc;
status = okay;
};
};
};
clock-controller at 1e6e2000 {
compatible = aspeed,ast2600-scu;
reg = <0x1e6e2000 0x00001000>;
u-boot,dm-pre-reloc;
#clock-cells = <0x00000001>;
#reset-cells = <0x00000001>;
uart-clk-source = <0x00000000>;
phandle = <0x00000002>;
};
reset-controller {
u-boot,dm-pre-reloc;
compatible = aspeed,ast2600-reset;
aspeed,wdt = <0x00000017>;
#reset-cells = <0x00000001>;
phandle = <0x00000004>;
};
sdrammc at 1e6e0000 {
u-boot,dm-pre-reloc;
compatible = aspeed,ast2600-sdrammc;
reg = <0x1e6e0000 0x00000100 0x1e6e0100 0x00000300 0x1e6e0400
0x00000200>;
#reset-cells = <0x00000001>;
clocks = <0x00000002 0x00000033>;
resets = <0x00000004 0x00000000>;
clock-frequency = <0x17d78400>;
};
};
Without the property:
$ fdtdump spl/u-boot-spl.dtb
**** fdtdump is a low-level debugging tool, not meant for general use.
**** If you want to decompile a dtb, you probably want
**** dtc -I dtb -O dts <filename>
/dts-v1/;
// magic: 0xd00dfeed
// totalsize: 0x9e5 (2533)
// off_dt_struct: 0x38
// off_dt_strings: 0x864
// off_mem_rsvmap: 0x28
// version: 17
// last_comp_version: 2
// boot_cpuid_phys: 0x0
// size_dt_strings: 0x181
// size_dt_struct: 0x82c
/ {
#address-cells = <0x00000001>;
#size-cells = <0x00000001>;
model = Rainier;
compatible = ibm,rainier-bmc, aspeed,ast2600;
chosen {
stdout-path = /ahb/apb/serial at 1e784000;
};
aliases {
serial4 = /ahb/apb/serial at 1e784000;
mmc0 = /ahb/apb/emmc at 1e750000/emmc_slot0 at 100;
};
ahb {
compatible = simple-bus;
#address-cells = <0x00000001>;
#size-cells = <0x00000001>;
device_type = soc;
ranges;
u-boot,dm-pre-reloc;
apb {
compatible = simple-bus;
#address-cells = <0x00000001>;
#size-cells = <0x00000001>;
ranges;
u-boot,dm-pre-reloc;
hace at 1e6d0000 {
compatible = aspeed,ast2600-hace;
reg = <0x1e6d0000 0x00000200>;
interrupts = <0x00000000 0x00000004 0x00000004>;
clocks = <0x00000002 0x00000007>;
clock-names = yclk;
status = okay;
u-boot,dm-pre-reloc;
};
emmc at 1e750000 {
#interrupt-cells = <0x00000001>;
compatible = aspeed,aspeed-emmc-irq, simple-mfd;
reg = <0x1e750000 0x00001000>;
interrupts = <0x00000000 0x0000000f 0x00000004>;
interrupt-controller;
clocks = <0x00000002 0x0000001f 0x00000002 0x00000020>;
clock-names = ctrlclk, extclk;
#address-cells = <0x00000001>;
#size-cells = <0x00000001>;
ranges = <0x00000000 0x1e750000 0x00001000>;
u-boot,dm-pre-reloc;
timing-phase = <0x000700ff>;
phandle = <0x00000012>;
emmc_slot0 at 100 {
compatible = aspeed,emmc-ast2600;
reg = <0x00000100 0x00000100>;
interrupts = <0x00000000>;
clocks = <0x00000002 0x00000035>;
status = okay;
u-boot,dm-pre-reloc;
bus-width = <0x00000004>;
sdhci-drive-type = <0x00000001>;
};
};
gpio at 1e780000 {
compatible = aspeed,ast2600-gpio;
reg = <0x1e780000 0x00000400>;
interrupts = <0x00000000 0x00000028 0x00000004>;
#gpio-cells = <0x00000002>;
gpio-controller;
interrupt-controller;
gpio-ranges = <0x00000014 0x00000000 0x00000000
0x000000d0>;
ngpios = <0x000000d0>;
u-boot,dm-pre-reloc;
};
serial at 1e784000 {
compatible = ns16550a;
reg = <0x1e784000 0x00001000>;
reg-shift = <0x00000002>;
interrupts = <0x00000000 0x00000024 0x00000004>;
clocks = <0x00000002 0x0000000f>;
clock-frequency = <0x001c2b8a>;
no-loopback-test;
status = okay;
u-boot,dm-pre-reloc;
};
watchdog at 1e785040 {
compatible = aspeed,ast2600-wdt;
reg = <0x1e785040 0x00000040>;
u-boot,dm-pre-reloc;
status = okay;
};
};
};
clock-controller at 1e6e2000 {
compatible = aspeed,ast2600-scu;
reg = <0x1e6e2000 0x00001000>;
u-boot,dm-pre-reloc;
#clock-cells = <0x00000001>;
#reset-cells = <0x00000001>;
uart-clk-source = <0x00000000>;
phandle = <0x00000002>;
};
reset-controller {
u-boot,dm-pre-reloc;
compatible = aspeed,ast2600-reset;
aspeed,wdt = <0x00000017>;
#reset-cells = <0x00000001>;
phandle = <0x00000004>;
};
sdrammc at 1e6e0000 {
u-boot,dm-pre-reloc;
compatible = aspeed,ast2600-sdrammc;
reg = <0x1e6e0000 0x00000100 0x1e6e0100 0x00000300 0x1e6e0400
0x00000200>;
#reset-cells = <0x00000001>;
clocks = <0x00000002 0x00000033>;
resets = <0x00000004 0x00000000>;
clock-frequency = <0x17d78400>;
};
};
>
> Andrew
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