[PATCH 1/2] pinctrl: aspeed: Enable pass-through on GPIOE1 and GPIOE3 free

[Joel Stanley]

On Wed, 2 Feb 2022 at 22:49, Andrew Jeffery <andrew at aj.id.au> wrote:
>
>
>
> On Thu, 3 Feb 2022, at 06:29, Bills, Jason M wrote:
> > This change adds a gpio_disable_free() implementation that checks
> > if the GPIO being freed is GPIOE1 (33) or GPIOE3 (35) and will
> > re-enable the pass-through mux.
>
> Okay. So trying to pull back from the implementation for a moment:
>
> Perhaps we can view pass-through as a property on a pair of GPIOs, rather than a mux state? I think it would be better if we could, for instance, annotate this in the devicetree?
>
> If we did that I don't think we're require this awkward and pin-specific implementation of the free callback for GPIOs.
>
> If pass-through is enabled it puts constraints on how the pins are used if they're requested as GPIOs, but we can add those dynamic checks in the GPIO driver.
>
> Let me think about it some more.
>
> Thanks for surfacing the patch.

This is for the kernel, I assume.

Jason, you should send the patch to the upstream lists (use
get_maintainers.pl) for review.

Cheers,

Joel