[PATCH u-boot v2019.04-aspeed-openbmc 1/2] aspeed/sdram: Use device tree to configure ECC

Joel Stanley joel at jms.id.au
Wed Aug 17 13:06:57 AEST 2022


On Wed, 17 Aug 2022 at 03:04, Dhananjay Phadke
<dphadke at linux.microsoft.com> wrote:
>
> On 8/16/2022 6:59 PM, Joel Stanley wrote:
> > Instead of configuring ECC based on the build config, use a device tree
> > property to selectively enable ECC at runtime.
> >
> > There are two properties:
> >
> >    aspeed,ecc-enabled;
> >    aspeed,ecc-size = "512";
> >
> > The enabled property is a boolean that enables ECC if it is present.
> >
> > The size is the number of MB that should be covered by ECC. Setting it
> > to zero, or omitting it, defaults the ECC size to "auto detect".
>
> What's the use case for enabling ECC only on part of the DRAM or not
> using max possible DRAM space?

I don't know. I have wondered the same, it's a good question for aspeed.

The objective of this patchset is to support the existing options with
runtime configuration, I think any change in functionality is a
separate issue.

> Couldn't this be just simple update based on what DTS memory node has?
>
> /* Update available size */
> info->info.size = (((info->info.size / 9) * 8) >> 20) << 20;
>
> Regards,
> Dhananjay


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