Advice on delaying de-asserting PCIe reset

sainath grandhi saiallforums at gmail.com
Wed May 12 05:50:34 AEST 2021


Hello,
We are potentially facing a scenario where de-asserting the PCIe
PERST# should wait until an endpoint in the PCI hierarchy is ready.
Since the endpoint of interest is an FPGA, it takes "some" time to
come out of reset, boot etc. to be ready and participate in Link
training followed by config space requests from Linux.

So we are checking for options on how we can delay de-asserting PERST#
in the Linux PCIe controller driver, if possible in a standard way.

A simple approach would be to add some time delay or wait for a signal
(via some pin) from the endpoint in the PCIe controller driver before
de-asserting PERST#.
But that would make the change specific to our use-case in an
otherwise generic board controller driver. And maintaining that logic
can become cumbersome.

How does Linux in general support such PCI endpoints to work fine?
Any advice on how to approach this scenario is appreciated.

Thanks


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