Progress Codes in BMC

[Venkatesh, Supreeth]

[AMD Official Use Only - Internal Distribution Only]

DBus interface and Phosphor-postcode-manager are equipped to handle 64 bit raw data.
However, phosphor-host-postd in its current form reads only 8 bits as you mentioned from LPC snoop port, which needs to be extended to read more than 8 bits.
Also, it is desirable to have capability to not just read the LPC snoop port(s), but also it should also be able to read from PLDM terminus with scope for extension to read from other device paths.(if necessary based on platform design)
May be a wrapper over the  phosphor-host-postd (which will be LPC snoop reading application), some other application(s) to read from various other device paths can be an option.

Further, I think the original idea from Manoj was to display this progress code via the standard interfaces like GUI control panel, AFAIK, this is not present with current UI.
Right now, We(AMD) are extending the GUI by just adding state sensor which displays the last value in Sensors page with future expansion to add a link to /var/lib/<phosphor-postcode-manager>/currrentbootIndex file to
get the entire post codes.

Thanks,
Supreeth
From: chunhui.jia <chunhui.jia at linux.intel.com>
Sent: Sunday, January 24, 2021 8:24 PM
To: Patrick Williams <patrick at stwcx.xyz>; Venkatesh, Supreeth <Supreeth.Venkatesh at amd.com>
Cc: openbmc <openbmc at lists.ozlabs.org>
Subject: Re: Re: Progress Codes in BMC

[CAUTION: External Email]
Patrick, Deepak,

Current post code is stored as 64bits although data from HW is 8bits. It should be enough to host. With said, we don't need to extend as it is already 64bits.

https://github.com/openbmc/phosphor-dbus-interfaces/blob/master/xyz/openbmc_project/State/Boot/Raw.interface.yaml#L6<https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.com%2Fopenbmc%2Fphosphor-dbus-interfaces%2Fblob%2Fmaster%2Fxyz%2Fopenbmc_project%2FState%2FBoot%2FRaw.interface.yaml%23L6&data=04%7C01%7Csupreeth.venkatesh%40amd.com%7Ce3e9a73c11f448affeb508d8c0d856e6%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637471382696079136%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=oZMT2egLjtk76X6qhck1XFppvcFfcN58nuXnRd%2BnZDc%3D&reserved=0>
https://github.com/openbmc/phosphor-dbus-interfaces/blob/master/xyz/openbmc_project/State/Boot/PostCode.interface.yaml#L45<https://nam11.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.com%2Fopenbmc%2Fphosphor-dbus-interfaces%2Fblob%2Fmaster%2Fxyz%2Fopenbmc_project%2FState%2FBoot%2FPostCode.interface.yaml%23L45&data=04%7C01%7Csupreeth.venkatesh%40amd.com%7Ce3e9a73c11f448affeb508d8c0d856e6%7C3dd8961fe4884e608e11a82d994e183d%7C0%7C0%7C637471382696089131%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&sdata=ojTEgHx9oHCC6ro0rNW0o3wjCxuCBPchjjtb41S7Tmg%3D&reserved=0>

2021-01-25
________________________________
chunhui.jia
________________________________
发件人：Patrick Williams <patrick at stwcx.xyz<mailto:patrick at stwcx.xyz>>
发送时间：2021-01-22 22:52
主题：Re: Progress Codes in BMC
收件人："Supreeth Venkatesh"<supreeth.venkatesh at amd.com<mailto:supreeth.venkatesh at amd.com>>
抄送："openbmc"<openbmc at lists.ozlabs.org<mailto:openbmc at lists.ozlabs.org>>

On Fri, Jan 22, 2021 at 08:18:29AM -0600, Supreeth Venkatesh wrote:
> On 1/22/21 6:32 AM, Deepak Kodihalli wrote:
> > On Fri, Jan 22, 2021 at 5:25 PM manoj kiran <manojkiran.eda at gmail.com<mailto:manojkiran.eda at gmail.com>> wrote:
> > Maybe some of the apps I pointed above can be extended for this
> > purpose, but I'm yet to take a closer look.
> One of the deviations on AMD platforms is that POST code is usually 32 bit code.
> I did extend phosphor-host-postd to read 32 bit codes and added experimental associated driver in Linux, as LPC ports supported is only two.
> However, it is far from production quality code at this point. We can definitely collaborate on this to arrive at a generic solution.

I was also going to point to the postcode daemons as a good starting
point.  On Intel platforms, the postcodes are typically 1 byte.  The
previous postcode daemon got its data from the LPC "port 80" mechanism,
but Facebook/HCL recently extended it to support multi-host and to be
able to consume postcodes from an IPMB end-point (which is how we talk
to our per-host microcontroller).

I think it should be fairly straight-forward to add a new mechanism to
pick up data from PLDM or whatever your path is on Power.  The daemons
in question here already support keeping a history as well.  I think the
only think you'd need to do is extend it to be 32-bit or 64-bit progress
codes instead of just 8-bit, but I see no reason why that shouldn't be
acceptable.  It sounds like Supreeth might even have some code as a
starting point?

(Supreeth maybe you can throw up anything you've done to the postcode
daemons into Gerrit as a starting point?)

--
Patrick Williams

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