[PATCH v3 3/4] soc: aspeed: Add eSPI driver
Joel Stanley
joel at jms.id.au
Fri Aug 27 15:48:50 AEST 2021
On Fri, 27 Aug 2021 at 03:52, ChiaWei Wang <chiawei_wang at aspeedtech.com> wrote:
>
> Aspeed 5th and 6th generation SoCs are based on the ARM 32-bits architecture.
> Should we follow the report to make the driver 64-bits compatible?
> Or revise the driver to use more specific data types?
Yes, in general it's expected your driver will compile cleanly for
64-bit architectures. This helps with testing and static analysis,
where CI builds all the drivers for x86.
Cheers,
Joel
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