[PATCH] board: ast2400: Enable SGPIO in SCU

[Willy Tu]

Hi Joel,

thanks for the response.

Sorry, I did not update the patch to include the branch name. I'll be more
careful next time.

This change should be in `v2019.04-aspeed-openbmc` and the other patch in
https://lore.kernel.org/openbmc/20210413161238.2816187-1-wltu@google.com/
should
be in `v2016.07-aspeed-openbmc`.

I have not tested this change, but have tested
https://lore.kernel.org/openbmc/20210413161238.2816187-1-wltu@google.com/ that
I based off of (Which I have tested with my setup). Will that be an issue?

Best,

Willy Tu

On Tue, Apr 13, 2021 at 4:32 PM Joel Stanley <joel at jms.id.au> wrote:

> Hi Willy,
>
> On Tue, 13 Apr 2021 at 16:11, Willy Tu <wltu at google.com> wrote:
> >
> > Add option to enable register for SGPIO in SCU.
> >
> > Included new function register values for ast2400
> > SCU and enable the SGPIO function in board init.
>
> Which branch would you like this patch applied to?
>
> >
> > Signed-off-by: Willy Tu <wltu at google.com>
> > ---
> >  arch/arm/include/asm/arch-aspeed/scu_ast2400.h |  4 ++++
> >  arch/arm/mach-aspeed/ast2400/Kconfig           |  4 ++++
> >  arch/arm/mach-aspeed/ast2400/board_common.c    | 15 +++++++++++++++
> >  3 files changed, 23 insertions(+)
> >
> > diff --git a/arch/arm/include/asm/arch-aspeed/scu_ast2400.h
> b/arch/arm/include/asm/arch-aspeed/scu_ast2400.h
> > index 9c5d96ae84..17eaaf3e9d 100644
> > --- a/arch/arm/include/asm/arch-aspeed/scu_ast2400.h
> > +++ b/arch/arm/include/asm/arch-aspeed/scu_ast2400.h
> > @@ -75,6 +75,10 @@
> >  #define SCU_PIN_FUN_SCL2               (1 << 14)
> >  #define SCU_PIN_FUN_SDA1               (1 << 13)
> >  #define SCU_PIN_FUN_SDA2               (1 << 15)
> > +#define SCU_PIN_FUN_SGPMCK             (0x1 << 8)
> > +#define SCU_PIN_FUN_SGPMLD             (0x1 << 9)
> > +#define SCU_PIN_FUN_SGPMO              (0x1 << 10)
> > +#define SCU_PIN_FUN_SGPMI              (0x1 << 11)
> >
> >  #define SCU_D2PLL_EXT1_OFF             (1 << 0)
> >  #define SCU_D2PLL_EXT1_BYPASS          (1 << 1)
> > diff --git a/arch/arm/mach-aspeed/ast2400/Kconfig
> b/arch/arm/mach-aspeed/ast2400/Kconfig
> > index f76276860c..c4e88b5140 100644
> > --- a/arch/arm/mach-aspeed/ast2400/Kconfig
> > +++ b/arch/arm/mach-aspeed/ast2400/Kconfig
> > @@ -17,6 +17,10 @@ config TARGET_EVB_AST2400
> >           20 pin JTAG, pinouts for 14 I2Cs, 3 SPIs and eSPI, 8 PWMs.
> >  endchoice
> >
> > +config ENABLE_SGPIO
> > +    tristate "Enable SGPIO in SCU"
> > +       default n
> > +
> >  source "board/aspeed/evb_ast2400/Kconfig"
> >
> >  endif
> > diff --git a/arch/arm/mach-aspeed/ast2400/board_common.c
> b/arch/arm/mach-aspeed/ast2400/board_common.c
> > index 3829b06934..eca2ef03e5 100644
> > --- a/arch/arm/mach-aspeed/ast2400/board_common.c
> > +++ b/arch/arm/mach-aspeed/ast2400/board_common.c
> > @@ -14,6 +14,21 @@ __weak int board_init(void)
> >  {
> >         gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
> >
> > +#ifdef CONFIG_ENABLE_SGPIO
> > +#define SCU_BASE 0x1e6e2000
> > +#define SCU_FUN_PIN_CTRL2 0x84 /* Multi-function Pin Control#2*/
> > +       /* Unlock SCU */
> > +       writel(SCU_UNLOCK_VALUE, SCU_BASE);
> > +
> > +       /* Enable SGPIO Master */
> > +       u32 reg = readl(SCU_BASE + SCU_FUN_PIN_CTRL2);
> > +
> > +       reg |= (SCU_PIN_FUN_SGPMI  |
> > +                       SCU_PIN_FUN_SGPMO  |
> > +                       SCU_PIN_FUN_SGPMLD |
> > +                       SCU_PIN_FUN_SGPMCK);
> > +       writel(reg, SCU_BASE + SCU_FUN_PIN_CTRL2);
> > +#endif
> >         return 0;
> >  }
> >
> > --
> > 2.31.1.295.g9ea45b61b8-goog
> >
>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.ozlabs.org/pipermail/openbmc/attachments/20210413/e575a579/attachment-0001.htm>