<div dir="ltr">Hi Joel,<div><br></div><div>thanks for the response.<div><br></div><div>Sorry, I did not update the patch to include the branch name. I'll be more careful next time.<br></div><div><br></div><div>This change should be in `v2019.04-aspeed-openbmc` and the other patch in <a href="https://lore.kernel.org/openbmc/20210413161238.2816187-1-wltu@google.com/">https://lore.kernel.org/openbmc/20210413161238.2816187-1-wltu@google.com/</a> should be in `v2016.07-aspeed-openbmc`.</div><div><br></div><div>I have not tested this change, but have tested  <a href="https://lore.kernel.org/openbmc/20210413161238.2816187-1-wltu@google.com/">https://lore.kernel.org/openbmc/20210413161238.2816187-1-wltu@google.com/</a> that I based off of (Which I have tested with my setup). Will that be an issue?</div><div><br></div><div>Best,</div><div><br></div><div>Willy Tu</div></div></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Tue, Apr 13, 2021 at 4:32 PM Joel Stanley <<a href="mailto:joel@jms.id.au">joel@jms.id.au</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">Hi Willy,<br>
<br>
On Tue, 13 Apr 2021 at 16:11, Willy Tu <<a href="mailto:wltu@google.com" target="_blank">wltu@google.com</a>> wrote:<br>
><br>
> Add option to enable register for SGPIO in SCU.<br>
><br>
> Included new function register values for ast2400<br>
> SCU and enable the SGPIO function in board init.<br>
<br>
Which branch would you like this patch applied to?<br>
<br>
><br>
> Signed-off-by: Willy Tu <<a href="mailto:wltu@google.com" target="_blank">wltu@google.com</a>><br>
> ---<br>
>  arch/arm/include/asm/arch-aspeed/scu_ast2400.h |  4 ++++<br>
>  arch/arm/mach-aspeed/ast2400/Kconfig           |  4 ++++<br>
>  arch/arm/mach-aspeed/ast2400/board_common.c    | 15 +++++++++++++++<br>
>  3 files changed, 23 insertions(+)<br>
><br>
> diff --git a/arch/arm/include/asm/arch-aspeed/scu_ast2400.h b/arch/arm/include/asm/arch-aspeed/scu_ast2400.h<br>
> index 9c5d96ae84..17eaaf3e9d 100644<br>
> --- a/arch/arm/include/asm/arch-aspeed/scu_ast2400.h<br>
> +++ b/arch/arm/include/asm/arch-aspeed/scu_ast2400.h<br>
> @@ -75,6 +75,10 @@<br>
>  #define SCU_PIN_FUN_SCL2               (1 << 14)<br>
>  #define SCU_PIN_FUN_SDA1               (1 << 13)<br>
>  #define SCU_PIN_FUN_SDA2               (1 << 15)<br>
> +#define SCU_PIN_FUN_SGPMCK             (0x1 << 8)<br>
> +#define SCU_PIN_FUN_SGPMLD             (0x1 << 9)<br>
> +#define SCU_PIN_FUN_SGPMO              (0x1 << 10)<br>
> +#define SCU_PIN_FUN_SGPMI              (0x1 << 11)<br>
><br>
>  #define SCU_D2PLL_EXT1_OFF             (1 << 0)<br>
>  #define SCU_D2PLL_EXT1_BYPASS          (1 << 1)<br>
> diff --git a/arch/arm/mach-aspeed/ast2400/Kconfig b/arch/arm/mach-aspeed/ast2400/Kconfig<br>
> index f76276860c..c4e88b5140 100644<br>
> --- a/arch/arm/mach-aspeed/ast2400/Kconfig<br>
> +++ b/arch/arm/mach-aspeed/ast2400/Kconfig<br>
> @@ -17,6 +17,10 @@ config TARGET_EVB_AST2400<br>
>           20 pin JTAG, pinouts for 14 I2Cs, 3 SPIs and eSPI, 8 PWMs.<br>
>  endchoice<br>
><br>
> +config ENABLE_SGPIO<br>
> +    tristate "Enable SGPIO in SCU"<br>
> +       default n<br>
> +<br>
>  source "board/aspeed/evb_ast2400/Kconfig"<br>
><br>
>  endif<br>
> diff --git a/arch/arm/mach-aspeed/ast2400/board_common.c b/arch/arm/mach-aspeed/ast2400/board_common.c<br>
> index 3829b06934..eca2ef03e5 100644<br>
> --- a/arch/arm/mach-aspeed/ast2400/board_common.c<br>
> +++ b/arch/arm/mach-aspeed/ast2400/board_common.c<br>
> @@ -14,6 +14,21 @@ __weak int board_init(void)<br>
>  {<br>
>         gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;<br>
><br>
> +#ifdef CONFIG_ENABLE_SGPIO<br>
> +#define SCU_BASE 0x1e6e2000<br>
> +#define SCU_FUN_PIN_CTRL2 0x84 /* Multi-function Pin Control#2*/<br>
> +       /* Unlock SCU */<br>
> +       writel(SCU_UNLOCK_VALUE, SCU_BASE);<br>
> +<br>
> +       /* Enable SGPIO Master */<br>
> +       u32 reg = readl(SCU_BASE + SCU_FUN_PIN_CTRL2);<br>
> +<br>
> +       reg |= (SCU_PIN_FUN_SGPMI  |<br>
> +                       SCU_PIN_FUN_SGPMO  |<br>
> +                       SCU_PIN_FUN_SGPMLD |<br>
> +                       SCU_PIN_FUN_SGPMCK);<br>
> +       writel(reg, SCU_BASE + SCU_FUN_PIN_CTRL2);<br>
> +#endif<br>
>         return 0;<br>
>  }<br>
><br>
> --<br>
> 2.31.1.295.g9ea45b61b8-goog<br>
><br>
</blockquote></div>