[PATCH 1/3] mtd: spi-nor: aspeed: fix training of multiple CS on the AST2600

Cédric Le Goater clg at kaod.org
Mon Sep 30 20:05:54 AEST 2019


Each CE has its own read timing compensation register.

Fixes: c62871befcdb ("mtd: spi-nor: aspeed: add support for AST2600 training")
Signed-off-by: Cédric Le Goater <clg at kaod.org>
---
 drivers/mtd/spi-nor/aspeed-smc.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/mtd/spi-nor/aspeed-smc.c b/drivers/mtd/spi-nor/aspeed-smc.c
index e9bc89755912..ad9e04fdb8ad 100644
--- a/drivers/mtd/spi-nor/aspeed-smc.c
+++ b/drivers/mtd/spi-nor/aspeed-smc.c
@@ -1114,12 +1114,13 @@ static int aspeed_smc_optimize_read(struct aspeed_smc_chip *chip,
 
 #define TIMING_DELAY_DI         BIT(3)
 #define TIMING_DELAY_HCYCLE_MAX     5
+#define TIMING_REG_AST2600(chip)					\
+	((chip)->controller->regs + (chip)->controller->info->timing +	\
+	 (chip)->cs * 4)
 
 static int aspeed_smc_calibrate_reads_ast2600(struct aspeed_smc_chip *chip, u32 hdiv,
 					      const u8 *golden_buf, u8 *test_buf)
 {
-	struct aspeed_smc_controller *controller = chip->controller;
-	const struct aspeed_smc_info *info = controller->info;
 	int hcycle;
 	u32 shift = (hdiv - 2) << 3;
 	u32 mask = ~(0xfu << shift);
@@ -1133,7 +1134,7 @@ static int aspeed_smc_calibrate_reads_ast2600(struct aspeed_smc_chip *chip, u32
 		fread_timing_val |= hcycle << shift;
 
 		/* no DI input delay first  */
-		writel(fread_timing_val, controller->regs + info->timing);
+		writel(fread_timing_val, TIMING_REG_AST2600(chip));
 		pass = aspeed_smc_check_reads(chip, golden_buf, test_buf);
 		dev_dbg(chip->nor.dev,
 			"  * [%08x] %d HCLK delay, DI delay none : %s",
@@ -1149,7 +1150,7 @@ static int aspeed_smc_calibrate_reads_ast2600(struct aspeed_smc_chip *chip, u32
 			fread_timing_val &= ~(0xf << (4 + shift));
 			fread_timing_val |= delay_ns << (4 + shift);
 
-			writel(fread_timing_val, controller->regs + info->timing);
+			writel(fread_timing_val, TIMING_REG_AST2600(chip));
 			pass = aspeed_smc_check_reads(chip, golden_buf, test_buf);
 			dev_dbg(chip->nor.dev,
 				"  * [%08x] %d HCLK delay, DI delay %d.%dns : %s",
-- 
2.21.0



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