[PATCH v2 1/2] dt-binding: iio: add NPCM ADC documentation

[Tomer Maimon]

Hi Joel,

Thanks for bringing this to my attention,

I think I will leave it the same way it is now because I will like to
develop the reset driver and to handle the NPCM7xx SOC resets.

Cheers,

Tomer



On Wed, 16 Jan 2019 at 01:21, Joel Stanley <joel at jms.id.au> wrote:

> On Thu, 10 Jan 2019 at 03:44, Tomer Maimon <tmaimon77 at gmail.com> wrote:
>
> > +Required Node in the NPCM7xx BMC:
> > +An additional register is present in the NPCM7xx SOC which is
> > +assumed to be in the same device tree, with and marked as
> > +compatible with "nuvoton,npcm750-rst".
>
> Is there a reason you don't include a phandle to the reset node?
>
> I think doing that would make more sense.
>
> > +adc: adc at f000c000 {
> > +       compatible = "nuvoton,npcm750-adc";
> > +       reg = <0xf000c000 0x8>;
> > +       interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
> > +       clocks = <&clk NPCM7XX_CLK_ADC>;
> > +};
>
> > +
> > +rst: rst at f0801000 {
> > +       compatible = "nuvoton,npcm750-rst", "syscon",
> > +       "simple-mfd";
> > +       reg = <0xf0801000 0x6C>;
> > +};
>
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