[PATCH dev-5.0 1/4] mtd: spi-nor: aspeed: introduce a aspeed_smc_default_read() helper

[Alexander Amelkin]

17.04.2019 16:39, Cédric Le Goater wrote:
> Signed-off-by: Cédric Le Goater <clg at kaod.org>
> ---
>  drivers/mtd/spi-nor/aspeed-smc.c | 19 ++++++++++++-------
>  1 file changed, 12 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/mtd/spi-nor/aspeed-smc.c b/drivers/mtd/spi-nor/aspeed-smc.c
> index ddf7ae78aa0a..ee3059b27c07 100644
> --- a/drivers/mtd/spi-nor/aspeed-smc.c
> +++ b/drivers/mtd/spi-nor/aspeed-smc.c
> @@ -882,6 +882,17 @@ static const uint32_t aspeed_smc_hclk_divs[] = {
>  };
>  #define ASPEED_SMC_HCLK_DIV(i) (aspeed_smc_hclk_divs[(i) - 1] << 8)
>  
> +static u32 aspeed_smc_default_read(struct aspeed_smc_chip *chip)
> +{
> +	return (chip->ctl_val[smc_read] & 0x2000) |

Cédric, isn't this a good time to get rid of these cached ctl_val values?

Why not read/modify/store the actual register?

What's the profit of this caching?

With best regards,
Alexander Amelkin,
Leading BMC Software Engineer, YADRO
https://yadro.com


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