[PATCH dev-5.0 1/4] mtd: spi-nor: aspeed: introduce a aspeed_smc_default_read() helper

[Cédric Le Goater]

Signed-off-by: Cédric Le Goater <clg at kaod.org>
---
 drivers/mtd/spi-nor/aspeed-smc.c | 19 ++++++++++++-------
 1 file changed, 12 insertions(+), 7 deletions(-)

diff --git a/drivers/mtd/spi-nor/aspeed-smc.c b/drivers/mtd/spi-nor/aspeed-smc.c
index ddf7ae78aa0a..ee3059b27c07 100644
--- a/drivers/mtd/spi-nor/aspeed-smc.c
+++ b/drivers/mtd/spi-nor/aspeed-smc.c
@@ -882,6 +882,17 @@ static const uint32_t aspeed_smc_hclk_divs[] = {
 };
 #define ASPEED_SMC_HCLK_DIV(i) (aspeed_smc_hclk_divs[(i) - 1] << 8)
 
+static u32 aspeed_smc_default_read(struct aspeed_smc_chip *chip)
+{
+	return (chip->ctl_val[smc_read] & 0x2000) |
+		(0x00 << 28) | /* Single bit */
+		(0x00 << 24) | /* CE# max */
+		(0x03 << 16) | /* use normal reads */
+		(0x00 <<  8) | /* HCLK/16 */
+		(0x00 <<  6) | /* no dummy cycle */
+		(0x00);        /* normal mode */
+}
+
 static int aspeed_smc_optimize_read(struct aspeed_smc_chip *chip,
 				     u32 max_freq)
 {
@@ -898,13 +909,7 @@ static int aspeed_smc_optimize_read(struct aspeed_smc_chip *chip,
 	/* We start with the dumbest setting (keep 4Byte bit) and read
 	 * some data
 	 */
-	chip->ctl_val[smc_read] = (chip->ctl_val[smc_read] & 0x2000) |
-		(0x00 << 28) | /* Single bit */
-		(0x00 << 24) | /* CE# max */
-		(0x03 << 16) | /* use normal reads */
-		(0x00 <<  8) | /* HCLK/16 */
-		(0x00 <<  6) | /* no dummy cycle */
-		(0x00);        /* normal read */
+	chip->ctl_val[smc_read] = aspeed_smc_default_read(chip);
 
 	writel(chip->ctl_val[smc_read], chip->ctl);
 
-- 
2.20.1