[HELP] ipmi-kcs didn't work

Ryan Chen ryan_chen at aspeedtech.com
Wed Dec 5 19:43:11 AEDT 2018

        The default is running, not to stop.


Hi Ryan,

I want to confirm the register default set of LCLK is running or stop for Aspped SoC?

Hi Jae,
I want to confirm that does the aspeed_gates is set for matching with the SoC default clock setting?

I need to these things information for joining the discussion to assist patch to send upstream.


Samuel Jiang

On Dec 4, 2018, 2:17 PM +0800, Ryan Chen , wrote:

Hello Jae,
ASPEED LPC IP HW block have serval clk input.
Most important is LCLK is come from LPC Host.
The others is not controllable by register.

-----Original Message-----
From: Vijay Khemka [mailto:vijaykhemka at fb.com]
Sent: Tuesday, December 4, 2018 3:38 AM
To: Jae Hyun Yoo <jae.hyun.yoo at linux.intel.com<mailto:jae.hyun.yoo at linux.intel.com>>; Samuel Jiang <chyishian.jiang at gmail.com<mailto:chyishian.jiang at gmail.com>>; qianlihu <wangzhiqiang8906 at gmail.com<mailto:wangzhiqiang8906 at gmail.com>>; Gary Hsu <gary_hsu at aspeedtech.com<mailto:gary_hsu at aspeedtech.com>>; Ryan Chen <ryan_chen at aspeedtech.com<mailto:ryan_chen at aspeedtech.com>>
Cc: openbmc at lists.ozlabs.org<mailto:openbmc at lists.ozlabs.org>
Subject: Re: [HELP] ipmi-kcs didn't work

On 12/3/18, 7:54 AM, "Jae Hyun Yoo" <jae.hyun.yoo at linux.intel.com<mailto:jae.hyun.yoo at linux.intel.com>> wrote:

On 12/1/2018 8:29 AM, Samuel Jiang wrote:

Apologize for sending out no content mail first.

The aspeed_gates in clk-aspeed.c perhaps as todo suggest asking Aspeed
the actual parent data for check initializing?

Yes, that makes sense.

Hi Gary and Ryan,

Can you please tell us what is the actual parent clock source of LPC IP?
I mean the operational clock of LPC IP hardware block, not the interface


I traced lpc-ctrl module, it seems direct update the same
ASPEED_CLK_GATE_LCLK register map bit to enable. If parent data is
disabled, it could enable in dts.
The device tree detail, I reference it from aspeed-g5.dtsi. Hope it
could help you for work.


Samuel Jiang

In my case if I don't initialize LPC clock in driver, Bios on host side wait and doesn't boot.
I don't understand here what is holding Bios here but by initializing this LPC clock let bios boot.

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