[HELP] ipmi-kcs didn't work

Jae Hyun Yoo jae.hyun.yoo at linux.intel.com
Tue Dec 4 07:16:44 AEDT 2018

On 12/3/2018 1:37 PM, Vijay Khemka wrote:
> On 12/3/18, 7:54 AM, "Jae Hyun Yoo" <jae.hyun.yoo at linux.intel.com> wrote:
>      On 12/1/2018 8:29 AM, Samuel Jiang wrote:
>      > Apologize for sending out no content mail first.
>      >
>      > Jae,
>      > The aspeed_gates in clk-aspeed.c perhaps as todo suggest asking Aspeed
>      > the actual parent data for check initializing?
>      >
>      Yes, that makes sense.
>      Hi Gary and Ryan,
>      Can you please tell us what is the actual parent clock source of LPC IP?
>      I mean the operational clock of LPC IP hardware block, not the interface
>      clock.
>      Thanks,
>      Jae
>      > Vijay,
>      > I traced lpc-ctrl module, it seems direct update the same
>      > ASPEED_CLK_GATE_LCLK register map bit to enable. If parent data is
>      > disabled, it could enable in dts.
>      > The device tree detail, I reference it from aspeed-g5.dtsi. Hope it
>      > could help you for work.
>      >
>      > Thanks,
>      >
>      > Samuel Jiang
> Samual/Jay,
> In my case if I don't initialize LPC clock in driver, Bios on host side wait and doesn't boot.
> I don't understand here what is holding Bios here but by initializing this LPC clock let bios boot.

Hi Vijay,
I also need to test Samuel's patch on real hardware. Probably, I could
share my test result next week because I'm in a business trip. Will
share my test result as soon as I back to office. Also, I'm currently
asking Aspeed engineers to check the parent clock of the LCLK to fill
out the parent clock info in clk-aspeed.c. If it is available, we would
not need to use CLK_IS_CRITICAL flag, I'm guessing. Will update this
thread as soon as possible.


> Regards
> -Vijay

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