[PATCH linux dev-4.17 2/2] mtd: spi-nor: fix spi register address for AST2400

Alexander Soldatov a.soldatov at yadro.com
Thu Aug 16 20:40:55 AEST 2018


According to AST2400 datasheet v1.4 the SPI Flash Read Timing
Setting register is at offset 0x14. There is no register at
offset 0x94 (unlike FMC controller and AST2500).

Cc: stable at vger.kernel.org
Fixes: aad58eba7209 ("mtd: spi-nor: aspeed: optimize read mode")
Signed-off-by: Alexander Soldatov <a.soldatov at yadro.com>
---
 drivers/mtd/spi-nor/aspeed-smc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/spi-nor/aspeed-smc.c b/drivers/mtd/spi-nor/aspeed-smc.c
index c9cd20f199d9..9ddf24b042f1 100644
--- a/drivers/mtd/spi-nor/aspeed-smc.c
+++ b/drivers/mtd/spi-nor/aspeed-smc.c
@@ -71,7 +71,7 @@ static const struct aspeed_smc_info spi_2400_info = {
 	.hastype = false,
 	.we0 = 0,
 	.ctl0 = 0x04,
-	.timing = 0x94,
+	.timing = 0x14,
 	.set_4b = aspeed_smc_chip_set_4b_spi_2400,
 	.optimize_read = aspeed_smc_optimize_read,
 };
-- 
2.7.4



More information about the openbmc mailing list