[PATCH linux dev-4.10] aspeed-g5: add gpiolib irqchip support.
Andrew Jeffery
andrew at aj.id.au
Fri Jun 30 11:39:23 AEST 2017
Hi Mykola,
On Thu, 2017-06-29 at 16:32 +0300, Mykola Kostenok wrote:
> To allow support gpio class infrastructure for Aspeed SOC.
> To allow gpio_to_irq conversion.
>
> Enable irqchip and libgpio_irqchip for aspeed-g5.
>
> > Signed-off-by: Mykola Kostenok <c_mykolak at mellanox.com>
> ---
> arch/arm/mach-aspeed/Kconfig | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/arch/arm/mach-aspeed/Kconfig b/arch/arm/mach-aspeed/Kconfig
> index f3f8c5c658db..e098b7a780ee 100644
> --- a/arch/arm/mach-aspeed/Kconfig
> +++ b/arch/arm/mach-aspeed/Kconfig
> @@ -27,6 +27,9 @@ config MACH_ASPEED_G5
> > depends on ARCH_MULTI_V6
> > select CPU_V6
> > select PINCTRL_ASPEED_G5
> > + select GENERIC_IRQ_CHIP
> + select GPIOLIB_IRQCHIP
Sorry, I don't understand the need for this; CONFIG_GPIOLIB_IRQCHIP is
already selected by CONFIG_GPIO_ASPEED, which is enabled by the
aspeed_g5_defconfig. I don't think we need to do this here.
Further, what problem are you trying to solve? From my testing GPIO
interrupts are functional.
Cheers,
Andrew
> +
> > help
> > Say yes if you intend to run on an Aspeed ast2500 or similar
> > fifth generation Aspeed BMCs.
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