[PATCH linux dev-4.10 v2] ARM: dts: aspeed: quanta: Enable pwm fans

Patrick Venture venture at google.com
Thu Jun 29 00:01:23 AEST 2017


On Tue, Jun 27, 2017 at 11:06 PM, Joel Stanley <joel at jms.id.au> wrote:
> On Tue, Jun 27, 2017 at 11:14 PM, Patrick Venture <venture at google.com> wrote:
>> Signed-off-by: Patrick Venture <venture at google.com>
>> ---
>> v2: Moved pwm_tacho_fixed_clk to clocks.
>> ---
>>  arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts | 51 ++++++++++++++++++++++++++++
>>  arch/arm/boot/dts/aspeed-g4.dtsi             |  5 +++
>>  2 files changed, 56 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts b/arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts
>> index e609c53d58f5..3abc2954d26e 100644
>> --- a/arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts
>> +++ b/arch/arm/boot/dts/aspeed-bmc-quanta-q71l.dts
>> @@ -46,6 +46,57 @@
>>                         gpios = <&gpio ASPEED_GPIO(B, 3) GPIO_ACTIVE_LOW>;
>>                 };
>>         };
>> +
>> +       pwm_tacho: pwm-tacho-controller at 1e786000 {
>> +               #address-cells = <1>;
>> +               #size-cells = <1>;
>> +               reg = <0x1E786000 0x1000>;
>
> Nit: convention is to use lowecase for hex numbers in the dt.

Easy fix will come in next version. :D

>
>> +               compatible = "aspeed,ast2500-pwm-tacho";
>> +               clocks = <&pwm_tacho_fixed_clk>;
>> +               pinctrl-names = "default";
>> +               pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
>> +                       &pinctrl_pwm2_default &pinctrl_pwm3_default>;
>
> It looks like you're using fans 0..7, but you're only requesting the
> pins for the first four fans. Should you be requesting all 8?

The pwm actually drives a pair on this board.  So, we have 8 fans, but
only four active pwm controls.  I don't know if this is a driver issue
but the fans are paired and work as a pair.

>
> Cheers,
>
> Joel
>
>> +
>> +               fan at 0 {
>> +                       reg = <0x00>;
>> +                       aspeed,fan-tach-ch = /bits/ 8 <0x00>;
>> +               };
>> +
>> +               fan at 1 {
>> +                       reg = <0x01>;
>> +                       aspeed,fan-tach-ch = /bits/ 8 <0x01>;
>> +               };
>> +
>> +               fan at 2 {
>> +                       reg = <0x02>;
>> +                       aspeed,fan-tach-ch = /bits/ 8 <0x02>;
>> +               };
>> +
>> +               fan at 3 {
>> +                       reg = <0x03>;
>> +                       aspeed,fan-tach-ch = /bits/ 8 <0x03>;
>> +               };
>> +
>> +               fan at 4 {
>> +                       reg = <0x00>;
>> +                       aspeed,fan-tach-ch = /bits/ 8 <0x04>;
>> +               };
>> +
>> +               fan at 5 {
>> +                       reg = <0x01>;
>> +                       aspeed,fan-tach-ch = /bits/ 8 <0x05>;
>> +               };
>> +
>> +               fan at 6 {
>> +                       reg = <0x02>;
>> +                       aspeed,fan-tach-ch = /bits/ 8 <0x06>;
>> +               };
>> +
>> +               fan at 7 {
>> +                       reg = <0x03>;
>> +                       aspeed,fan-tach-ch = /bits/ 8 <0x07>;
>> +               };
>> +       };
>>  };
>>
>>  &fmc {
>> diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
>> index a998a00a2728..9cc959fccfa0 100644
>> --- a/arch/arm/boot/dts/aspeed-g4.dtsi
>> +++ b/arch/arm/boot/dts/aspeed-g4.dtsi
>> @@ -36,6 +36,11 @@
>>         };
>>
>>         clocks {
>> +               pwm_tacho_fixed_clk: fixedclk {
>> +                       compatible = "fixed-clock";
>> +                       #clock-cells = <0>;
>> +                       clock-frequency = <24000000>;
>> +               };
>>         };
>>
>>         ahb {
>> --
>> 2.13.1.611.g7e3b11ae1-goog
>>


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