[PATCH linux dev-4.7 0/4] SuperIO and Host Interface Controllers

[Xo Wang]

Hi Andrew,

On Mon, Jan 9, 2017 at 4:03 PM, Andrew Jeffery <andrew at aj.id.au> wrote:
> Hi Xo,
>
> On Mon, 2017-01-09 at 15:11 -0800, Xo Wang wrote:
>> Hi folks,
>>
>> > On Wed, Nov 9, 2016 at 5:35 PM, Andrew Jeffery <andrew at aj.id.au> wrote:
>> > Hello,
>> >
>> > This series adds some sysfs drivers exposing parts of the LPC controller. The
>> > patches are pretty bare-bones in that they provide zero sanity checking and
>> > leave decisions entirely to userspace. They're also slightly tedious, so I
>> > expect (hope) their current form will be short-lived.
>> >
>> > Cheers,
>> >
>> > Andrew
>> >
>> > Andrew Jeffery (4):
>> >   misc: Expose Aspeed SuperIO scratch registers (SCRxSIO)
>> >   misc: Add partial Aspeed LPC Host Interface Control (HIC) driver
>> >   arm: aspeed: dt: Add SuperIO scratch register nodes
>> >   arm: aspeed: dt: Add LPC Host Interface Controller nodes
>> >
>> >  arch/arm/boot/dts/aspeed-g4.dtsi |  10 ++
>> >  arch/arm/boot/dts/aspeed-g5.dtsi |  10 ++
>> >  drivers/misc/Kconfig             |  14 +++
>> >  drivers/misc/Makefile            |   2 +
>> >  drivers/misc/aspeed-hic.c        | 198 +++++++++++++++++++++++++++++++++++++++
>> >  drivers/misc/aspeed-scrsio.c     | 141 ++++++++++++++++++++++++++++
>> >  6 files changed, 375 insertions(+)
>> >  create mode 100644 drivers/misc/aspeed-hic.c
>> >  create mode 100644 drivers/misc/aspeed-scrsio.c
>> >
>> > --
>> > 2.9.3
>> >
>> > _______________________________________________
>> > openbmc mailing list
>> > openbmc at lists.ozlabs.org
>> > https://lists.ozlabs.org/listinfo/openbmc
>>
>> I noticed that this driver wasn't merged. Was there a change of plan
>> to how LPC controller functionality should be exported?
>>
>> This is still useful for us to set up memboot and to listen for port
>> 80 post codes.
>
> Cyril has reworked the HICR parts of the memboot function here:
>
> https://lists.ozlabs.org/pipermail/openbmc/2016-December/006089.html
>
> It would be good to get your feedback the approach. Cyril is going to
> send out another revision shortly and will Cc you.
>
> As for the post codes these patches didn't expose the PCCRs in sysfs -
> have you modified them?

We don't have code that touch PCCRs. I was waiting to see how these
drivers would go and discuss with Jagha how she would like to
implement that part of her POST code work.

>
> Regardless, given Cyril now has a better approach for the LPC Host
> Interface Controller we should probably rethink the approach for
> SuperIO scratch registers and PCCRs. These patches were always just
> hacks and Joel had to pushed me to send them out.
>
> Andrew

cheers
xo