[PATCH linux v3] arm: aspeed: zaius: Disable LPC reset for UART1

[Joel Stanley]

On Fri, Feb 3, 2017 at 11:45 AM, Andrew Jeffery <andrew at aj.id.au> wrote:
> On Tue, 2017-01-31 at 17:12 -0800, Xo Wang wrote:
>> Currently, UART1 on Zaius BMC is unusable until brought out of reset by
>> powering the host on. In that default reset state, ttyS0 can still be
>> opened and UART1 silently drops bytes, which is not obviously expected
>> behavior.
>>
>> Clear the LPC block control bit that enables LPCRST# as a reset source
>> for UART1, making UART1 immediately useful in that it won't discard
>> bytes.
>>
>> > Signed-off-by: Xo Wang <xow at google.com>
>> ---
>>  arch/arm/mach-aspeed/aspeed.c | 8 ++++++++
>>  1 file changed, 8 insertions(+)
>>
>> diff --git a/arch/arm/mach-aspeed/aspeed.c b/arch/arm/mach-aspeed/aspeed.c
>> index 4bd3680d742d..b7022eaa7b5d 100644
>> --- a/arch/arm/mach-aspeed/aspeed.c
>> +++ b/arch/arm/mach-aspeed/aspeed.c
>> @@ -185,6 +185,14 @@ static void __init do_zaius_setup(void)
>>
>> >     /* Set SPI1 CE0 decoding window to 0x30000000 */
>> >     writel(0x68600000, AST_IO(AST_BASE_SPI | 0x30));
>> +
>> > +   /* Disable default behavior of UART1 being held in reset by LPCRST#.
>> > +    * By releasing UART1 from being controlled by LPC reset, it becomes
>> > +    * immediately available regardless of the host being up.
>> +      * */
>
> Joel: Want to clean up the formatting here when you apply it? If so:
>
> Reviewed-by: Andrew Jeffery <andrew at aj.id.au>

Thanks. I fixed the formatting of the comment when I applied. This is
in dev-4.7 now.

Cheers,

Joel