[PATCH linux dev-4.10 v2 11/11] aspeed: zaius: Disable GPIO bias via devicetree pinconf requests

[Xo Wang]

On Fri, Apr 28, 2017 at 12:10 AM, Andrew Jeffery <andrew at aj.id.au> wrote:
> Signed-off-by: Andrew Jeffery <andrew at aj.id.au>
> ---
>  arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts | 16 ++++++++++++----
>  arch/arm/mach-aspeed/aspeed.c              |  4 ----
>  2 files changed, 12 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts b/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
> index acf7cc8d0e6d..b5c4c0fb2986 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-opp-zaius.dts
> @@ -333,7 +333,19 @@
>          */
>  };
>
> +&pinctrl {
> +       aspeed,external-nodes = <&gfx &lhc>;
> +
> +       pinctrl_gpioh_unbiased: gpioi_unbiased {
> +               pins = "A8", "C7", "B7", "A7", "D7", "B6", "A6", "E7";

Out of curiosity, do you need to specify all eight pins affected by
the "unbiased" register bit, or only the ones that you need for some
functionality? In this case, only the first four pins are required for
the 1-wire interfaces, but the whole port's pull-downs are controlled
by one bit.

> +               bias-disable;
> +       };
> +};
> +
>  &gpio {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&pinctrl_gpioh_unbiased>;
> +
>         line_iso_u146_en {
>                 gpio-hog;
>                 gpios = <ASPEED_GPIO(O, 4) GPIO_ACTIVE_HIGH>;
> @@ -370,7 +382,3 @@
>  &gfx {
>         status = "okay";
>  };
> -
> -&pinctrl {
> -       aspeed,external-nodes = <&gfx &lhc>;
> -};
> diff --git a/arch/arm/mach-aspeed/aspeed.c b/arch/arm/mach-aspeed/aspeed.c
> index 814a303a3894..760fed641a0b 100644
> --- a/arch/arm/mach-aspeed/aspeed.c
> +++ b/arch/arm/mach-aspeed/aspeed.c
> @@ -124,10 +124,6 @@ static void __init do_zaius_setup(void)
>         reg = readl(AST_IO(AST_BASE_GPIO | 0x78));
>         board_rev = (reg >> 3) & 0x1F;
>
> -       /* Disable GPIO H/AC pulldowns to float 1-wire interface pins */
> -       reg = readl(AST_IO(AST_BASE_SCU | 0x8C));
> -       writel(reg | BIT(23), AST_IO(AST_BASE_SCU | 0x8C));
> -
>         /* Assert MAC2 PHY hardware reset */
>         /* Set pin low */
>         reg = readl(AST_IO(AST_BASE_GPIO | 0x00));
> --
> 2.9.3
>

+OpenBMC list

Reviewed-by: Xo Wang <xow at google.com>