[PATCH linux] pinctrl-aspeed-g5: Never set SCU90[6]

[Cédric Le Goater]

On 10/31/2016 07:11 AM, Andrew Jeffery wrote:
> The description of SCU90[6] from the datasheet: 'Reserved, must keep at
> value ”0”'.
> 
> Switch from the bit-flipping macro to explicitly configuring
> .enable = .disable = 0.
> 
> If a pin depending on SCU90[6] is requested for GPIO, the export will
> succeed but changes to the GPIO's value fail to stick. With the fix the
> value can be toggled as expected. The patch has been tested on an
> AST2500 EVB.

That is an important condition for SP1 also. Could that have an impact on 
the spi1debug setting in the witherspoon DTS ? Is it still needed ? 

C.

> Reported-by: Uma Yadlapati <yadlapat at us.ibm.com>
> Signed-off-by: Andrew Jeffery <andrew at aj.id.au>
> ---
>  drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
> index 481e836d12e5..9a3139c13ffc 100644
> --- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
> +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
> @@ -26,7 +26,7 @@
>  
>  #define ASPEED_G5_NR_PINS 232
>  
> -#define COND1		SIG_DESC_BIT(SCU90, 6, 0)
> +#define COND1		{ SCU90, BIT(6), 0, 0 }
>  #define COND2		{ SCU94, GENMASK(1, 0), 0, 0 }
>  
>  #define LHCR0		SIG_DESC_TO_REG(ASPEED_IP_LPC, 0xA0)
>