[RFC 0/2] spi: aspeed: SPI1 mode control driver enabling sysfs control

[Kun Yi]

Hi Joel, thanks for commenting!


On Sun, Oct 23, 2016 at 6:59 PM, Joel Stanley <joel at jms.id.au> wrote:

> Hell Kun,
>
> On Sat, Oct 22, 2016 at 11:15 AM, Kun Yi <kunyi at google.com> wrote:
> > Hello,
> >
> > I'm looking for feedback on a simple Aspeed SPI1 mode control driver
> that does two things mainly:
> > 1. Expose a sysfs interface for userland control of SPI1 interface.
> > 2. Optionally override the SPI1 mode at probe if "start_mode" is
> configured in
> >    device tree.
>
> Why do you plan to override the mode at boot time? Is this for firmware
> updates?
>

More important here is the ability to change the SPI mode at *run time*.
One use case is for platforms without eSPI/LPC support. When host CPU is
booting and BIOS needs to read SPI chip, the most straightforward way for
BMC to allow host access to the SPI chip is to toggle to SPI pass-through
mode. Thus the core purpose of the driver is for enabling SPI pass-through
mode on demand.

Overriding the SPI mode at boot time is only to make sure the host SPI chip
can be recognized correctly by the SMC driver. Because currently pinctrl
treats HW strap as read-only, mis-configured HW strap pins will cause SMC
driver to fail reading SPI flash ID and not register it in MTD subsystem,
and there is no easy way to probe again later. Though enabling pinctrl to
set HW strap register might be a better approach as Andrew mentioned.


> We plan to move away from having the NOR flash accessible from both
> the host and the BMC for all platforms. There's no good way to
> indicate ownership, and the Linux mtd subsystem does not have a good
> way of relinquishing nor reestablishing control. For instance, there's
> no way to "unmount" the MTD device, and there's no way to force a
> re-scan of partitions if you modify the layout.
>

I saw some discussions related on IRC but wasn't clear about the details.
Could you elaborate a little? Do you plan to only allow BMC daemons to
access both host/BMC NOR flashes?

I got the impression that mtd will stick around for now. Do we have a time
frame for deprecating that?


> I think there are some issues with your approach that break
> pinctrl/pinmux that Andrew will highlight.
>

Sure I will reply to those in Andrew's email.


>
> Cheers,
>
> Joel
>
> >
> > Aspeed 24XX/25XX support three interface modes for their SPI1 interface,
> > which can be configured via HW strap register. In the typical case of
> connecting
> > a host flash chip SPI1 interface:
> > - SPI master mode makes BMC the master to the host SPI flash
> > - SPI pass-through mode make whichever external SPI interface connected
> to SYSSPI
> >   be the master
> > - There are also "disable" and "debug" modes. Aspeed 25XX specified the
> debug
> >   mode is reserved though.
> >
> > In particular, SPI pass-through mode would enable an external SPI master
> to
> > directly program host SPI chip and possibly serve as an alternative way
> to LPC
> > for host CPU accessing SPI flash. I think by providing a sysfs handle,
> userspace
> > applications can have a flexible way to mux host SPI flash ownership
> between
> > BMC/external on the fly.
> >
> > Overriding the SPI mode at probe time can be useful to make sure
> 2500-smc flash
> > controller always identifies the flash chip and create /dev/mtd files
> correctly.
> >
> > I wrote the driver as a standalone misc driver for the ease of initial
> implementation.
> > There are other options such as merging the functionality into the SMC
> driver
> > itself, possibly enabled by optional device tree arguments/nodes, but I
> just want to
> > send the patches out first to gather comments on perceived usefulness of
> > the feature and how you think the driver should be constructed.
> >
> > Feedback greatly appreciated!
> >
> > Regards,
> > Kun
> >
> > _______________________________________________
> > openbmc mailing list
> > openbmc at lists.ozlabs.org
> > https://lists.ozlabs.org/listinfo/openbmc
>



-- 
Regards,
Kun
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