[PATCH qemu 17/38] aspeed/smc: unfold the AspeedSMCController array

[Andrew Jeffery]

On Fri, 2016-11-18 at 15:21 +0100, Cédric Le Goater wrote:
> This is getting difficult to read. Also add a 'has_dma' field for
> each
> controller type.
> 
> Signed-off-by: Cédric Le Goater <clg at kaod.org>

Reviewed-by: Andrew Jeffery <andrew at aj.id.au>

> ---
>  hw/ssi/aspeed_smc.c         | 91
> ++++++++++++++++++++++++++++++++++++---------
>  include/hw/ssi/aspeed_smc.h |  1 +
>  2 files changed, 74 insertions(+), 18 deletions(-)
> 
> diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
> index eec087199a22..8e7e3bd9e335 100644
> --- a/hw/ssi/aspeed_smc.c
> +++ b/hw/ssi/aspeed_smc.c
> @@ -184,24 +184,79 @@ static const AspeedSegments
> aspeed_segments_ast2500_spi2[] = {
>  };
>  
>  static const AspeedSMCController controllers[] = {
> -    { "aspeed.smc.smc", R_CONF, R_CE_CTRL, R_CTRL0, R_TIMINGS,
> -      CONF_ENABLE_W0, 5, aspeed_segments_legacy,
> -      ASPEED_SOC_SMC_FLASH_BASE, 0x6000000 },
> -    { "aspeed.smc.fmc", R_CONF, R_CE_CTRL, R_CTRL0, R_TIMINGS,
> -      CONF_ENABLE_W0, 5, aspeed_segments_fmc,
> -      ASPEED_SOC_FMC_FLASH_BASE, 0x10000000 },
> -    { "aspeed.smc.spi", R_SPI_CONF, 0xff, R_SPI_CTRL0,
> R_SPI_TIMINGS,
> -      SPI_CONF_ENABLE_W0, 1, aspeed_segments_spi,
> -      ASPEED_SOC_SPI_FLASH_BASE, 0x10000000 },
> -    { "aspeed.smc.ast2500-fmc", R_CONF, R_CE_CTRL, R_CTRL0,
> R_TIMINGS,
> -      CONF_ENABLE_W0, 3, aspeed_segments_ast2500_fmc,
> -      ASPEED_SOC_FMC_FLASH_BASE, 0x10000000 },
> -    { "aspeed.smc.ast2500-spi1", R_CONF, R_CE_CTRL, R_CTRL0,
> R_TIMINGS,
> -      CONF_ENABLE_W0, 2, aspeed_segments_ast2500_spi1,
> -      ASPEED_SOC_SPI_FLASH_BASE, 0x8000000 },
> -    { "aspeed.smc.ast2500-spi2", R_CONF, R_CE_CTRL, R_CTRL0,
> R_TIMINGS,
> -      CONF_ENABLE_W0, 2, aspeed_segments_ast2500_spi2,
> -      ASPEED_SOC_SPI2_FLASH_BASE, 0x8000000 },
> +    {
> +        .name              = "aspeed.smc.smc",
> +        .r_conf            = R_CONF,
> +        .r_ce_ctrl         = R_CE_CTRL,
> +        .r_ctrl0           = R_CTRL0,
> +        .r_timings         = R_TIMINGS,
> +        .conf_enable_w0    = CONF_ENABLE_W0,
> +        .max_slaves        = 5,
> +        .segments          = aspeed_segments_legacy,
> +        .flash_window_base = ASPEED_SOC_SMC_FLASH_BASE,
> +        .flash_window_size = 0x6000000,
> +        .has_dma           = false,
> +    }, {
> +        .name              = "aspeed.smc.fmc",
> +        .r_conf            = R_CONF,
> +        .r_ce_ctrl         = R_CE_CTRL,
> +        .r_ctrl0           = R_CTRL0,
> +        .r_timings         = R_TIMINGS,
> +        .conf_enable_w0    = CONF_ENABLE_W0,
> +        .max_slaves        = 5,
> +        .segments          = aspeed_segments_fmc,
> +        .flash_window_base = ASPEED_SOC_FMC_FLASH_BASE,
> +        .flash_window_size = 0x10000000,
> +        .has_dma           = true,
> +    }, {
> +        .name              = "aspeed.smc.spi",
> +        .r_conf            = R_SPI_CONF,
> +        .r_ce_ctrl         = 0xff,
> +        .r_ctrl0           = R_SPI_CTRL0,
> +        .r_timings         = R_SPI_TIMINGS,
> +        .conf_enable_w0    = SPI_CONF_ENABLE_W0,
> +        .max_slaves        = 1,
> +        .segments          = aspeed_segments_spi,
> +        .flash_window_base = ASPEED_SOC_SPI_FLASH_BASE,
> +        .flash_window_size = 0x10000000,
> +        .has_dma           = false,
> +    }, {
> +        .name              = "aspeed.smc.ast2500-fmc",
> +        .r_conf            = R_CONF,
> +        .r_ce_ctrl         = R_CE_CTRL,
> +        .r_ctrl0           = R_CTRL0,
> +        .r_timings         = R_TIMINGS,
> +        .conf_enable_w0    = CONF_ENABLE_W0,
> +        .max_slaves        = 3,
> +        .segments          = aspeed_segments_ast2500_fmc,
> +        .flash_window_base = ASPEED_SOC_FMC_FLASH_BASE,
> +        .flash_window_size = 0x10000000,
> +        .has_dma           = true,
> +    }, {
> +        .name              = "aspeed.smc.ast2500-spi1",
> +        .r_conf            = R_CONF,
> +        .r_ce_ctrl         = R_CE_CTRL,
> +        .r_ctrl0           = R_CTRL0,
> +        .r_timings         = R_TIMINGS,
> +        .conf_enable_w0    = CONF_ENABLE_W0,
> +        .max_slaves        = 2,
> +        .segments          = aspeed_segments_ast2500_spi1,
> +        .flash_window_base = ASPEED_SOC_SPI_FLASH_BASE,
> +        .flash_window_size = 0x8000000,
> +        .has_dma           = false,
> +    }, {
> +        .name              = "aspeed.smc.ast2500-spi2",
> +        .r_conf            = R_CONF,
> +        .r_ce_ctrl         = R_CE_CTRL,
> +        .r_ctrl0           = R_CTRL0,
> +        .r_timings         = R_TIMINGS,
> +        .conf_enable_w0    = CONF_ENABLE_W0,
> +        .max_slaves        = 2,
> +        .segments          = aspeed_segments_ast2500_spi2,
> +        .flash_window_base = ASPEED_SOC_SPI2_FLASH_BASE,
> +        .flash_window_size = 0x8000000,
> +        .has_dma           = false,
> +    },
>  };
>  
>  /*
> diff --git a/include/hw/ssi/aspeed_smc.h
> b/include/hw/ssi/aspeed_smc.h
> index c64954f6103f..39ee601940e8 100644
> --- a/include/hw/ssi/aspeed_smc.h
> +++ b/include/hw/ssi/aspeed_smc.h
> @@ -44,6 +44,7 @@ typedef struct AspeedSMCController {
>      const AspeedSegments *segments;
>      hwaddr flash_window_base;
>      uint32_t flash_window_size;
> +    bool has_dma;
>  } AspeedSMCController;
>  
>  typedef struct AspeedSMCFlash {
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