[PATCH 3/7] arm: aspeed: Remove SCU88 hacks

[Andrew Jeffery]

On Tue, 2016-11-22 at 14:38 +1030, Joel Stanley wrote:
>  - BMC IRQ (GPIO P6): This is set to "BMC IRQ# interrupt output". This
>    is an input connected called BMC_PE_WAKE_N in Palmetto.  It's driven
>    by a PCIe device. Userspace does not read it from a browse of
>    skeleton.
> 
>  - FLACK (GPIO P7): This is set to "Enable NOR flask ACK control
>    input pin". It's pulled high on Palmetto.
> 
>  - The other pins are the PWM/Video pins. They are not used by OpenBMC

There's a PWM driver on the list right? Regardless, we don't need this
hack.

> .
> 
> Signed-off-by: Joel Stanley <joel at jms.id.au>

Reviewed-by: Andrew Jeffery <andrew at aj.id.au>

> ---
>  arch/arm/mach-aspeed/aspeed.c | 1 -
>  1 file changed, 1 deletion(-)
> 
> diff --git a/arch/arm/mach-aspeed/aspeed.c b/arch/arm/mach-aspeed/aspeed.c
> index 0e4c34a91ac3..ea76c95c33fc 100644
> --- a/arch/arm/mach-aspeed/aspeed.c
> +++ b/arch/arm/mach-aspeed/aspeed.c
> @@ -46,7 +46,6 @@ static void __init do_common_setup(void)
> >  	writel(0x00000000, AST_IO(AST_BASE_LPC | 0x9c));
>  
> >  	/* TODO: This should go in the GPIO driver device tree bindings */
> > -	writel(0x01C000FF, AST_IO(AST_BASE_SCU | 0x88));
> >  	writel(0xC1C000FF, AST_IO(AST_BASE_SCU | 0x8c));
>  
> >  	/* Setup scratch registers */
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