[PATCH 3/7] arm: aspeed: Remove SCU88 hacks

Joel Stanley joel at jms.id.au
Tue Nov 22 15:08:45 AEDT 2016


 - BMC IRQ (GPIO P6): This is set to "BMC IRQ# interrupt output". This
   is an input connected called BMC_PE_WAKE_N in Palmetto.  It's driven
   by a PCIe device. Userspace does not read it from a browse of
   skeleton.

 - FLACK (GPIO P7): This is set to "Enable NOR flask ACK control
   input pin". It's pulled high on Palmetto.

 - The other pins are the PWM/Video pins. They are not used by OpenBMC.

Signed-off-by: Joel Stanley <joel at jms.id.au>
---
 arch/arm/mach-aspeed/aspeed.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arm/mach-aspeed/aspeed.c b/arch/arm/mach-aspeed/aspeed.c
index 0e4c34a91ac3..ea76c95c33fc 100644
--- a/arch/arm/mach-aspeed/aspeed.c
+++ b/arch/arm/mach-aspeed/aspeed.c
@@ -46,7 +46,6 @@ static void __init do_common_setup(void)
 	writel(0x00000000, AST_IO(AST_BASE_LPC | 0x9c));
 
 	/* TODO: This should go in the GPIO driver device tree bindings */
-	writel(0x01C000FF, AST_IO(AST_BASE_SCU | 0x88));
 	writel(0xC1C000FF, AST_IO(AST_BASE_SCU | 0x8c));
 
 	/* Setup scratch registers */
-- 
2.10.2



More information about the openbmc mailing list