回信:Re: [PATCH linux] Add debounce for power button, pull down gpioQ7 to unlock identify LED
ken.th.liu at foxconn.com
ken.th.liu at foxconn.com
Thu May 12 20:05:30 AEST 2016
<DIV style="FONT-SIZE: 10pt; FONT-FAMILY: Microsoft Sans Serif">Hi Shenki</DIV>
<DIV style="FONT-SIZE: 10pt; FONT-FAMILY: Microsoft Sans Serif"> </DIV>
<DIV style="FONT-SIZE: 10pt; FONT-FAMILY: Microsoft Sans Serif">Response as below.<BR></DIV>
<DIV style="FONT-SIZE: 10pt; FONT-FAMILY: Microsoft Sans Serif">Thanks.<BR><BR>========================================<BR><BR>劉亭宏 Ken Liu<BR>Foxconn / Hon Hai Precision Ind. Co., Ltd.<BR>CESBG - Cloud Enterprise Solution Business Group<BR>SRD1<BR>Firmware Development Department<BR>TEL: +886-2-2268-3466 <BR>Ext. : 511 + 2704 (虎躍廠) <BR>Engineer (BMC Firmware)<BR>E-mail : ken.th.liu at foxconn.com<BR>(Ken T.H. Liu/CES/SUPERNOTES)<BR>2, Zihyou St., TU-CHENG, New TAIPEI City, 23644, Taiwan, R.O.C<BR><BR>========================================</DIV>
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<LABEL style="COLOR: #cc0099">— 回信者 ken.th.liu at mail.foxconn.com 於 2016/5/12 下午 04:58:41 —</LABEL><BR><BR>
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<TD style="COLOR: #0000ff" width=220>joel.stan at gmail.com</TD>
<TD style="COLOR: #0000ff" width=50 align=right>To： </TD>
<TD style="BORDER-TOP: 2px ridge; BORDER-RIGHT: 2px ridge; BORDER-BOTTOM: 2px ridge; BORDER-LEFT: 2px ridge" width=1000 noWrap>openbmc-patches at stwcx.xyz,ken.th.liu at mail.foxconn.com</TD></TR>
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<TD style="COLOR: #0000ff" width=50 align=right>Cc： </TD>
<TD style="BORDER-TOP: 2px ridge; BORDER-RIGHT: 2px ridge; BORDER-BOTTOM: 2px ridge; BORDER-LEFT: 2px ridge" width=1000 noWrap>openbmc at lists.ozlabs.org</TD></TR>
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<TD style="COLOR: #0000ff" width=220>2016/5/12 下午 03:14:13</TD>
<TD style="COLOR: #0000ff" width=50 align=right>主旨： </TD>
<TD style="BORDER-TOP: 2px ridge; BORDER-RIGHT: 2px ridge; BORDER-BOTTOM: 2px ridge; BORDER-LEFT: 2px ridge" width=1000 noWrap>Re: [PATCH linux] Add debounce for power button, pull down gpioQ7 to unlock identify LED</TD></TR></TBODY></TABLE><BR></DIV>
<P style="MARGIN: 2px">ping<BR><BR>On Mon, May 2, 2016 at 11:12 AM, Joel Stanley <joel at jms.id.au> wrote:<BR>> On Fri, Apr 29, 2016 at 3:10 PM, OpenBMC Patches<BR>> <openbmc-patches at stwcx.xyz> wrote:<BR>>> From: Ken <ken.sk.lai at mail.foxconn.com><BR>>><BR>><BR>> We need to include a description of why this change is being made.<BR>> What does it fix? Why does the previous behaviour need to be modified?<BR>><BR>>> ---<BR>>> arch/arm/mach-aspeed/aspeed.c | 8 ++++++--<BR>>> 1 file changed, 6 insertions(+), 2 deletions(-)<BR>>> mode change 100644 => 100755 arch/arm/mach-aspeed/aspeed.c<BR>>><BR>>> diff --git a/arch/arm/mach-aspeed/aspeed.c b/arch/arm/mach-aspeed/aspeed.c<BR>>> old mode 100644<BR>>> new mode 100755<BR>>> index 594a781..fa5d467<BR>>> --- a/arch/arm/mach-aspeed/aspeed.c<BR>>> +++ b/arch/arm/mach-aspeed/aspeed.c<BR>>> @@ -138,9 +138,10 @@ static void __init do_barreleye_setup(void)<BR>>> /* GPIO setup */<BR>>> writel(0x9E82FCE7, AST_IO(AST_BASE_GPIO | 0x00));<BR>>> writel(0x0370E677, AST_IO(AST_BASE_GPIO | 0x04));<BR>>> -<BR>>> + writel(0x00001080, AST_IO(AST_BASE_GPIO | 0x84));<BR>><BR>> We have a GPIO driver that handles setting this register.</P>
<P style="MARGIN: 2px"><FONT color=#0080ff>OK. We can move the code to skeleton.</FONT></P>
<P style="MARGIN: 2px"><FONT color=#0080ff></FONT> </P>
<P style="MARGIN: 2px"><FONT color=#0080ff>The GPIO is for unlock Identify LED by GPIOQ7 when power on.</FONT></P>
<P style="MARGIN: 2px"><BR>><BR>>> /* SCU setup */<BR>>> writel(0x01C00000, AST_IO(AST_BASE_SCU | 0x88));<BR>>> + writel(0x010FFFFF, AST_IO(AST_BASE_SCU | 0xA8));<BR>><BR>> Can you explain each of these you're setting each of these bits?</P>
<P style="MARGIN: 2px"> </P>
<P style="MARGIN: 2px"><FONT color=#0080ff>It's a long story, please check the attachment mail history.</FONT></P>
<P style="MARGIN: 2px"> </P>
<P style="MARGIN: 2px"><FONT color=#0080ff>To conclude, to avoid the debounce pulse for power button interrupt.</FONT></P>
<P style="MARGIN: 2px"> </P>
<P style="MARGIN: 2px"><BR>><BR>>> /*<BR>>> * Do read/modify/write on power gpio to prevent resetting power on<BR>>> @@ -150,7 +151,10 @@ static void __init do_barreleye_setup(void)<BR>>> reg |= 0xCFC8F7FD;<BR>>> writel(reg, AST_IO(AST_BASE_GPIO | 0x20));<BR>>> writel(0xC738F20A, AST_IO(AST_BASE_GPIO | 0x24));<BR>>> - writel(0x0031FFAF, AST_IO(AST_BASE_GPIO | 0x80));<BR>>> + writel(0x0031FF2F, AST_IO(AST_BASE_GPIO | 0x80));<BR>>> + writel(0x00000001, AST_IO(AST_BASE_GPIO | 0x48));<BR>>> + writel(0x00000001, AST_IO(AST_BASE_GPIO | 0x4C));<BR>>> + writel(0x00075300, AST_IO(AST_BASE_GPIO | 0x58));<BR>><BR>> As above; we have a GPIO driver that handles setting this register.<BR>> Changing these states needs to be done from userspace. See<BR>> https://github.com/openbmc/skeleton/blob/master/bin/Barreleye.py#L531<BR></P>
<DIV style="FONT-SIZE: 10pt; FONT-FAMILY: Microsoft Sans Serif"><BR>mail from ip-->10.38.3.183<BR>mail from pc-->KEN<BR>Version: Super Notes 1.6.5.9B</DIV>
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