[PATCH 1/2] pinctrl/aspeed: Add GPIOR to g4 pinmux

[Joel Stanley]

On Thu, Aug 11, 2016 at 11:10 AM, Andrew Jeffery <andrew at aj.id.au> wrote:
> On Wed, 2016-08-10 at 18:51 +0930, Joel Stanley wrote:
>> Signed-off-by: Joel Stanley <joel at jms.id.au>
>> ---
>>  drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c | 81 ++++++++++++++++++++++++++++--
>>  1 file changed, 78 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c
>> index d36e14892d4e..96952bf33b9f 100644
>> --- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c
>> +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c
>> @@ -585,6 +585,71 @@ SIG_EXPR_LIST_DECL(ROMCS1, SIG_EXPR_PTR(ROMCS1, ROM8),
>>               SIG_EXPR_PTR(ROMCS1, ROM16S));
>>  MS_PIN_DECL_(V20, SIG_EXPR_LIST_PTR(ROMCS1), SIG_EXPR_LIST_PTR(GPIOR0));
>>
>> +#define W21 137
>> +#define W21_DESC     SIG_DESC_SET(SCU88, 25)
>> +SIG_EXPR_LIST_DECL_SINGLE(GPIOR1, GPIOR1);
>> +SIG_EXPR_DECL(ROMCS2, ROM8, W21_DESC);
>> +SIG_EXPR_DECL(ROMCS2, ROM16, W21_DESC);
>> +SIG_EXPR_DECL(ROMCS2, ROM16S, W21_DESC);
>> +SIG_EXPR_LIST_DECL(ROMCS2, SIG_EXPR_PTR(ROMCS2, ROM8),
>> +             SIG_EXPR_PTR(ROMCS2, ROM16),
>> +             SIG_EXPR_PTR(ROMCS2, ROM16S));
>> +MS_PIN_DECL_(W21, SIG_EXPR_LIST_PTR(ROMCS2), SIG_EXPR_LIST_PTR(GPIOR1));
>
> I'm thinking we should separate out muxing of the chip selects from
> enabling the optional ROM signals. We need to hash that out before I
> resend the patches upstream.

Okay. I'll leave these as-is for now as I'm only interested in the
GPIOR bank for now.

>
>> +
>> +#define Y22 138
>> +#define Y22_DESC     SIG_DESC_SET(SCU88, 26)
>> +SIG_EXPR_LIST_DECL_SINGLE(GPIOR2, GPIOR2);
>> +SIG_EXPR_DECL(ROMCS3, ROM8, Y22_DESC);
>> +SIG_EXPR_DECL(ROMCS3, ROM16, Y22_DESC);
>> +SIG_EXPR_DECL(ROMCS3, ROM16S, Y22_DESC);
>> +SIG_EXPR_LIST_DECL(ROMCS3, SIG_EXPR_PTR(ROMCS3, ROM8),
>> +             SIG_EXPR_PTR(ROMCS3, ROM16),
>> +             SIG_EXPR_PTR(ROMCS3, ROM16S));
>> +MS_PIN_DECL_(Y22, SIG_EXPR_LIST_PTR(ROMCS3), SIG_EXPR_LIST_PTR(GPIOR2));
>> +
>> +#define U19 139
>> +#define U19_DESC     SIG_DESC_SET(SCU88, 27)
>> +SIG_EXPR_LIST_DECL_SINGLE(GPIOR3, GPIOR3);
>> +SIG_EXPR_DECL(ROMCS4, ROM8, U19_DESC);
>> +SIG_EXPR_DECL(ROMCS4, ROM16, U19_DESC);
>> +SIG_EXPR_DECL(ROMCS4, ROM16S, U19_DESC);
>> +SIG_EXPR_LIST_DECL(ROMCS4, SIG_EXPR_PTR(ROMCS4, ROM8),
>> +             SIG_EXPR_PTR(ROMCS4, ROM16),
>> +             SIG_EXPR_PTR(ROMCS4, ROM16S));
>> +MS_PIN_DECL_(U19, SIG_EXPR_LIST_PTR(ROMCS4), SIG_EXPR_LIST_PTR(GPIOR3));
>> +
>> +#define V21 140
>> +#define V21_DESC     SIG_DESC_SET(SCU88, 28)
>> +SIG_EXPR_DECL(ROMA24, ROM8, V21_DESC);
>> +SIG_EXPR_DECL(ROMA24, ROM16, V21_DESC);
>> +SIG_EXPR_DECL(ROMA24, ROM16S, V21_DESC);
>
> Ah, bug here, the DECLs above should be:
>
> SIG_EXPR_DECL(ROMA24, ROM8, V21_DESC, VPO_OFF_12);
> SIG_EXPR_DECL(ROMA24, ROM16, V21_DESC, VPO_OFF_12);
> SIG_EXPR_DECL(ROMA24, ROM16S, V21_DESC, VPO_OFF_12);

Fixed in v2.

>
>> +SIG_EXPR_LIST_DECL(ROMA24, SIG_EXPR_PTR(ROMA24, ROM8),
>> +             SIG_EXPR_PTR(ROMA24, ROM16),
>> +             SIG_EXPR_PTR(ROMA24, ROM16S));
>> +SIG_EXPR_LIST_DECL_SINGLE(VPOR6, VPO24, V21_DESC, VPO_24_OFF);
>> +MS_PIN_DECL(V21, GPIOR4, ROMA24, VPOR6);
>> +
>> +#define W22 141
>> +#define W22_DESC     SIG_DESC_SET(SCU88, 29)
>> +SIG_EXPR_DECL(ROMA25, ROM8, W22_DESC);
>> +SIG_EXPR_DECL(ROMA25, ROM16, W22_DESC);
>> +SIG_EXPR_DECL(ROMA25, ROM16S, W22_DESC);
>
> Similarly, these DECLs should be:
>
> SIG_EXPR_DECL(ROMA25, ROM8, W22_DESC, VPO_OFF_12);
> SIG_EXPR_DECL(ROMA25, ROM16, W22_DESC, VPO_OFF_12);
> SIG_EXPR_DECL(ROMA25, ROM16S, W22_DESC, VPO_OFF_12);

Fixed in v2.

Thanks for the review.

Cheers,

Joel