[PATCH] Document Linux's memory barriers [try #2]

[Ivan Kokshaysky]

On Thu, Mar 09, 2006 at 12:01:45PM +1100, Paul Mackerras wrote:
> If you do:
> 
> 	CPU 0			CPU 1
> 
> 	foo = val;
> 	wmb();
> 	p = &foo;
> 				reg = p;
> 				bar = *reg;
> 
> it is apparently possible for CPU 1 to see the new value of p
> (i.e. &foo) but an old value of foo (i.e. not val).  This can happen
> if p and foo are in different halves of the cache on CPU 1, and there
> are a lot of updates coming in for the half containing foo but the
> half containing p is quiet.

Indeed, this can happen according to architecture reference manual,
so CPU 1 needs mb() as well.

Thanks for clarification.

Ivan.