[PATCH] ppc64 - fix spinlock recursion in native_hpte_clear

[R Sharada]

Hello,
	kexec on Power4 (non-lpar) was breaking because of a spinlock 
recursion problem in native_hpte_clear. This patch fixes the recursion by 
changing the call to tlbie() in native_hpte_clear to call __tlbie() (as per
Milton's suggestion).
	native_hpte_clear and slot2va still do not support clearing of 
large pages (>4K pages). I do not know the large page support code well
enough to fix that at the moment. If any one has any ideas or can help fix
the hpte_clear code to add support for large pages, that would be appreciated.

	With this patch, I am able to kexec boot on Power4 non-lpar.
	Please review, provide comments, and consider for acceptance

Thanks and Regards,
Sharada


native_hpte_clear has a spin_lock recursion problem with the native_tlbie_lock
being called twice. Fixing the tlbie() call in native_hpte_clear to call
__tlbie(). It still supports only 4K pages for now.


Signed-off-by: R Sharada <sharada at in.ibm.com>
---


diff -puN arch/powerpc/mm/hash_native_64.c~fix_native_hpte_clear arch/powerpc/mm/hash_native_64.c
--- linux-2.6.16-rc4-tlbie/arch/powerpc/mm/hash_native_64.c~fix_native_hpte_clear	2006-02-20 22:01:49.000000000 +0530
+++ linux-2.6.16-rc4-tlbie-sharada/arch/powerpc/mm/hash_native_64.c	2006-02-20 22:05:31.000000000 +0530
@@ -383,6 +383,7 @@ static void native_hpte_clear(void)
 	hpte_t *hptep = htab_address;
 	unsigned long hpte_v;
 	unsigned long pteg_count;
+	unsigned long va;
 
 	pteg_count = htab_hash_mask + 1;
 
@@ -405,10 +406,12 @@ static void native_hpte_clear(void)
 
 		if (hpte_v & HPTE_V_VALID) {
 			hptep->v = 0;
-			tlbie(slot2va(hpte_v, slot), MMU_PAGE_4K, 0);
+			va = slot2va(hpte_v, slot);
+			__tlbie(va, MMU_PAGE_4K);
 		}
 	}
 
+	asm volatile("eieio; tlbsync; ptesync":::"memory");
 	spin_unlock(&native_tlbie_lock);
 	local_irq_restore(flags);
 }
_