AW: Re: __setup_cpu_be problem

[Olof Johansson]

On Wed, Feb 15, 2006 at 06:21:57AM -0500, Jimi Xenidis wrote:
> 
> On Feb 13, 2006, at 1:19 PM, Hartmut Penner wrote:
> 
> > I would like to support the large pages in the Firmware, but need  
> > to know
> > excactly what properties I have to set.
> 
> Why? What would you gain from using Large Pages?
> Is your FW that big?

I read that as he wants to have firmware configure which large pages to
use, and use the architected manners in which FW tells the OS which
pagesizes are available and what fields to set to select them, not
necessarily use them to map firmware memory?

> Are thinking of using Large PAges in IO space? Cuz I don't think you  
> can.

POWER5+ can use large I/O pages, at least 64K. Other processors might
also, but I don't know about Cell.

The problem with I/O pages on PPC 2.01 was when the page size was only
selected in the SLB entry. Since it's not a hypervisor resource, the OS
could break isolation requirements by mapping a 16M I/O page that allowed
access to other partitons' I/O space right after it's own. That's
probably why PPC970 has the HID bits to disable it.

This changed in PPC 2.02, where the L bit was introduced in the PTE
entry as well. So, there the HV has a chance to verify it being set
properly before allowing hash table insertions, which should allow for
16MB I/O pages also in a partitioned environment. I'm not sure if it's
actually used anywhere or not.


-Olof