[PATCH] [4/4] PPC64: Fix some page-size related hardcoded constants

[Olof Johansson]

Replace some of the hard-coded constants with PAGE_SIZE/SHIFT/ORDER where
appropriate.

Likewise, in a couple of places it doesn't make sense to base some allocations
on page size when all that's required is a constant 4K, etc.


Signed-off-by: Olof Johansson <olof at lixom.net>

Index: gr_work/arch/ppc64/kernel/head.S
===================================================================
--- gr_work.orig/arch/ppc64/kernel/head.S	2005-08-08 14:38:41.023520151 -0500
+++ gr_work/arch/ppc64/kernel/head.S	2005-08-08 14:52:21.688435819 -0500
@@ -714,7 +714,7 @@ machine_check_fwnmi:
 	.globl __start_stab
 __start_stab:
 
-	. = (STAB0_PHYS_ADDR + PAGE_SIZE)
+	. = (STAB0_PHYS_ADDR + 4096)
 	.globl __end_stab
 __end_stab:
 
@@ -2102,16 +2102,16 @@ _GLOBAL(smp_release_cpus)
  * which is page-aligned.
  */
 	.data
-	.align	12
+	.align	PAGE_SHIFT
 	.globl	sdata
 sdata:
 	.globl	empty_zero_page
 empty_zero_page:
-	.space	4096
+	.space	PAGE_SIZE
 
 	.globl	swapper_pg_dir
 swapper_pg_dir:
-	.space	4096
+	.space	PAGE_SIZE
 
 /*
  * This space gets a copy of optional info passed to us by the bootstrap
Index: gr_work/arch/ppc64/kernel/misc.S
===================================================================
--- gr_work.orig/arch/ppc64/kernel/misc.S	2005-08-08 14:38:41.023520151 -0500
+++ gr_work/arch/ppc64/kernel/misc.S	2005-08-08 14:49:49.783114926 -0500
@@ -329,7 +329,7 @@ _GLOBAL(__flush_dcache_icache)
 
 /* Flush the dcache */
  	ld	r7,PPC64_CACHES at toc(r2)
-	clrrdi	r3,r3,12           	    /* Page align */
+	clrrdi	r3,r3,PAGE_SHIFT           	    /* Page align */
 	lwz	r4,DCACHEL1LINESPERPAGE(r7)	/* Get # dcache lines per page */
 	lwz	r5,DCACHEL1LINESIZE(r7)		/* Get dcache line size */
 	mr	r6,r3
Index: gr_work/arch/ppc64/kernel/vmlinux.lds.S
===================================================================
--- gr_work.orig/arch/ppc64/kernel/vmlinux.lds.S	2005-08-08 14:38:41.024519995 -0500
+++ gr_work/arch/ppc64/kernel/vmlinux.lds.S	2005-08-08 14:49:49.784114770 -0500
@@ -1,3 +1,4 @@
+#include <asm/page.h>
 #include <asm-generic/vmlinux.lds.h>
 
 OUTPUT_ARCH(powerpc:common64)
@@ -16,7 +17,7 @@ SECTIONS
 	SCHED_TEXT
 	LOCK_TEXT
 	*(.fixup)
-	. = ALIGN(4096);
+	. = ALIGN(PAGE_SIZE);
 	_etext = .;
 	}
 
@@ -42,7 +43,7 @@ SECTIONS
 
 
   /* will be freed after init */
-  . = ALIGN(4096);
+  . = ALIGN(PAGE_SIZE);
   __init_begin = .;
 
   .init.text : {
@@ -82,7 +83,7 @@ SECTIONS
 
   SECURITY_INIT
 
-  . = ALIGN(4096);
+  . = ALIGN(PAGE_SIZE);
   .init.ramfs : {
 	__initramfs_start = .;
 	*(.init.ramfs)
@@ -95,13 +96,13 @@ SECTIONS
 	__per_cpu_end = .;
 	}
 
-  . = ALIGN(16384);
+  . = ALIGN(PAGE_SIZE);
   __init_end = .;
   /* freed after init ends here */
 
 
   /* Read/write sections */
-  . = ALIGN(16384);
+  . = ALIGN(PAGE_SIZE);
   /* The initial task and kernel stack */
   .data.init_task : {
 	*(.data.init_task)
@@ -128,18 +129,18 @@ SECTIONS
 	__toc_start = .;
 	*(.got)
 	*(.toc)
-	. = ALIGN(4096);
+	. = ALIGN(PAGE_SIZE);
 	_edata = .;
 	}
 
 
-  . = ALIGN(4096);
+  . = ALIGN(PAGE_SIZE);
   .bss : {
 	__bss_start = .;
 	*(.bss)
 	__bss_stop = .;
 	}
 
-  . = ALIGN(4096);
+  . = ALIGN(PAGE_SIZE);
   _end = . ;
 }
Index: gr_work/include/asm-ppc64/elf.h
===================================================================
--- gr_work.orig/include/asm-ppc64/elf.h	2005-08-08 14:38:41.030519059 -0500
+++ gr_work/include/asm-ppc64/elf.h	2005-08-08 14:49:49.786114457 -0500
@@ -4,6 +4,7 @@
 #include <asm/types.h>
 #include <asm/ptrace.h>
 #include <asm/cputable.h>
+#include <asm/page.h>
 
 /* PowerPC relocations defined by the ABIs */
 #define R_PPC_NONE		0
@@ -145,7 +146,7 @@ typedef elf_vrreg_t elf_vrregset_t32[ELF
 #define elf_check_arch(x) ((x)->e_machine == ELF_ARCH)
 
 #define USE_ELF_CORE_DUMP
-#define ELF_EXEC_PAGESIZE	4096
+#define ELF_EXEC_PAGESIZE	PAGE_SIZE
 
 /* This is the location that an ET_DYN program is loaded if exec'ed.  Typical
    use of this is to invoke "./ld.so someprog" to test out a new version of
Index: gr_work/include/asm-ppc64/thread_info.h
===================================================================
--- gr_work.orig/include/asm-ppc64/thread_info.h	2005-08-08 14:38:41.031518903 -0500
+++ gr_work/include/asm-ppc64/thread_info.h	2005-08-08 14:51:38.917765995 -0500
@@ -54,9 +54,9 @@ struct thread_info {
 
 /* thread information allocation */
 
-#define THREAD_ORDER		2
-#define THREAD_SIZE		(PAGE_SIZE << THREAD_ORDER)
-#define THREAD_SHIFT		(PAGE_SHIFT + THREAD_ORDER)
+#define THREAD_SHIFT		14
+#define THREAD_ORDER		(THREAD_SHIFT - PAGE_SHIFT)
+#define THREAD_SIZE		(1 << THREAD_SHIFT)
 #ifdef CONFIG_DEBUG_STACK_USAGE
 #define alloc_thread_info(tsk)					\
 	({							\
Index: gr_work/include/asm-ppc64/naca.h
===================================================================
--- gr_work.orig/include/asm-ppc64/naca.h	2005-03-17 19:20:24.000000000 -0600
+++ gr_work/include/asm-ppc64/naca.h	2005-08-08 14:52:00.166650722 -0500
@@ -26,6 +26,6 @@ extern struct naca_struct naca;
 #endif /* __ASSEMBLY__ */
 
 #define NACA_PAGE      0x4
-#define NACA_PHYS_ADDR (NACA_PAGE<<PAGE_SHIFT)
+#define NACA_PHYS_ADDR (NACA_PAGE<<12)
 
 #endif /* _NACA_H */
Index: gr_work/include/asm-ppc64/mmu.h
===================================================================
--- gr_work.orig/include/asm-ppc64/mmu.h	2005-08-08 15:39:26.341186787 -0500
+++ gr_work/include/asm-ppc64/mmu.h	2005-08-08 15:39:48.760088026 -0500
@@ -29,7 +29,7 @@
 
 /* Location of cpu0's segment table */
 #define STAB0_PAGE	0x9
-#define STAB0_PHYS_ADDR	(STAB0_PAGE<<PAGE_SHIFT)
+#define STAB0_PHYS_ADDR	(STAB0_PAGE<<12)
 #define STAB0_VIRT_ADDR	(KERNELBASE+STAB0_PHYS_ADDR)
 
 /*