[PATCH] cpu DLPAR remove

jschopp at austin.ibm.com jschopp at austin.ibm.com
Thu Apr 15 02:18:30 EST 2004


On Power4 and earlier hardware there is no need to clear the CPPR (see RPA
p 479 section 18.5.4.7.2 for what little info there is on the CPPR) when
stopping a cpu.  On hardware following Power4 an undocumented change has
been made that requires the CPPR to be cleared if an isolate is to be done
on the stopped cpu.  So the following patch lets cpu DLPAR work on the
recent hardware.

Since this is small, straightforward, and tested I plan to push it to
ameslab late this afternoon, unless of course there are objections.

-Joel

# This is a BitKeeper generated patch for the following project:
# Project Name: Linux kernel tree
# This patch format is intended for GNU patch command version 2.5 or higher.
# This patch includes the following deltas:
#	           ChangeSet	1.1555  -> 1.1556
#	include/asm-ppc64/xics.h	1.13    -> 1.14
#	arch/ppc64/kernel/xics.c	1.52    -> 1.53
#	arch/ppc64/kernel/smp.c	1.72    -> 1.73
#
# The following is the BitKeeper ChangeSet Log
# --------------------------------------------
# 04/04/14	jschopp at threadlp13.austin.ibm.com	1.1556
# Clear the cppr before stopping the cpu.  Some hardware isolate calls clear the cppr for you, other hardware expects the cppr to be cleared and will
# fail if it is not cleared.  None of it is documented in the hardware docs.
# --------------------------------------------
#
diff -Nru a/arch/ppc64/kernel/smp.c b/arch/ppc64/kernel/smp.c
--- a/arch/ppc64/kernel/smp.c	Wed Apr 14 11:05:27 2004
+++ b/arch/ppc64/kernel/smp.c	Wed Apr 14 11:05:27 2004
@@ -327,6 +327,7 @@
 void cpu_die(void)
 {
 	local_irq_disable();
+	pSeriesLP_cppr_info(0, 0);
 	rtas_stop_self();
 	/* Should never get here... */
 	BUG();
diff -Nru a/arch/ppc64/kernel/xics.c b/arch/ppc64/kernel/xics.c
--- a/arch/ppc64/kernel/xics.c	Wed Apr 14 11:05:27 2004
+++ b/arch/ppc64/kernel/xics.c	Wed Apr 14 11:05:27 2004
@@ -190,7 +190,7 @@
 		      val64);
 }

-static void pSeriesLP_cppr_info(int n_cpu, u8 value)
+void pSeriesLP_cppr_info(int n_cpu, u8 value)
 {
 	unsigned long lpar_rc;

diff -Nru a/include/asm-ppc64/xics.h b/include/asm-ppc64/xics.h
--- a/include/asm-ppc64/xics.h	Wed Apr 14 11:05:27 2004
+++ b/include/asm-ppc64/xics.h	Wed Apr 14 11:05:27 2004
@@ -19,6 +19,9 @@
 void xics_setup_cpu(void);
 void xics_cause_IPI(int cpu);

+/* first argument is ignored */
+void pSeriesLP_cppr_info(int n_cpu, u8 value);
+
 struct xics_ipi_struct {
 	volatile unsigned long value;
 } ____cacheline_aligned;


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