[RFC] JS20 IDE perf patch

Segher Boessenkool segher at kernel.crashing.org
Wed Dec 17 04:22:56 EST 2003

On 16-dec-03, at 17:51, Mark Hack wrote:

> The HT link is 400Mhz DDR 8 bit. The 200Mhz bus is the default but
> this is increased during init.
> The bus speed is therefore 400 x 2 MBytes /sec

That's not what the AMD spec
white_papers_and_tech_docs/24674.pdf , sorry if this link gets broken
up) says -- right on the
front page it says 200MHz DDR is max speed, and again it says so at
page 39 (bottom).

This DDR stuff is confusing sometimes ;-)


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