UPM setup

Laxmikant Rashinkar lk.atwork at yahoo.com
Fri Sep 5 11:36:20 EST 2008


I'm trying to set up the UPM RAM table for NAND access.
Here is how I do it:

        char __iomem *lbc_addr;
        int i;

        lbc_addr = ioremap(0xa0000000, 0x10);

        /* NAND chip (256MB) will be driven by UPM-A at LBC address 0xa0000000 */
        out_be32(&fsl_lbc_regs->bank[4].br, 0xa0000881);
        out_be32(&fsl_lbc_regs->bank[4].or, 0xf0000001);

        /* setup MAMR for sequential write to UPM-A RAM */
        out_be32(&fsl_lbc_regs->mamr, 0x10000000);

        for (i = 0; i < 64; i++) {
                out_be32(&fsl_lbc_regs->mdr, UPMATable[i]);
                out_8(lbc_addr, 0);   /* dummy write, byte wide */

        /* restore MAMR */
        out_be32(&fsl_lbc_regs->mamr, 0x00000000);

But this does not seem to be working. I have verified this in two ways

a) for each write to mdr in the for loop above, I read back mamr and print it. This should have an incrementing
MAD value, but it does not

b) I read back the data that I had stored in UPM-A RAM and that logic does not work either.

My take is that out_8(lbc_addr, 0) is not working because I'm not mapping lbc_addr correctly.
Can someone tell me what I'm doing wrong?

thanks for your help

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