fsldma seems to be buggy, noticed in loop mode

Sebastian Siewior linuxppc-embedded at ml.breakpoint.cc
Thu Mar 13 05:04:21 EST 2008


Hello,

I have a little kmod where I dma data from one place to another (can
post it if someone wants to see it). It works in general according to
memcmp :)

If I set the DAHE flag (DAHTS = 0, for one byte transfers) everything
seems to work as well (I see only the last byte which has the correct
value).
Now if I change the destination address to my FIFO I get the requested
transfer size plus some extra bytes. The extra bytes are looking like
exactly the same DMA transfer once again. Then my FIFO overruns.
Enabling some printks in the kernel gave me the following log:

|of-fsl-dma-channel e0021100.dma-channe: new link desc alloc df32a000
|of-fsl-dma-channel e0021100.dma-channe: --memcpy issue--
|of-fsl-dma-channel e0021100.dma-channe: Ch 0, LD 1f32a000
|of-fsl-dma-channel e0021100.dma-channe: LD offset 0: 00050000
|of-fsl-dma-channel e0021100.dma-channe: LD offset 1: 1f0be000
|of-fsl-dma-channel e0021100.dma-channe: LD offset 2: 00050000
|of-fsl-dma-channel e0021100.dma-channe: LD offset 3: 1f36c000
|of-fsl-dma-channel e0021100.dma-channe: LD offset 4: 00000000
|of-fsl-dma-channel e0021100.dma-channe: LD offset 5: 00000001
|of-fsl-dma-channel e0021100.dma-channe: LD offset 6: 00000100
|of-fsl-dma-channel e0021100.dma-channe: LD offset 7: 00000000
|of-fsl-dma-channel e0021100.dma-channe: ----------------
|of-fsl-dma-channel e0021100.dma-channe: xfer LDs staring from 0x000000001f32a000
|of-fsl-dma-channel e0021100.dma-channe: xfer LDs staring from 0x000000001f32a000
|of-fsl-dma-channel e0021100.dma-channe: xfer LDs staring from 0x000000001f32a000
|of-fsl-dma-channel e0021100.dma-channe: xfer LDs staring from 0x000000001f32a000
|of-fsl-dma-channel e0021100.dma-channe: xfer LDs staring from 0x000000001f32a000
|of-fsl-dma-channel e0021100.dma-channe: xfer LDs staring from 0x000000001f32a000
|of-fsl-dma-channel e0021100.dma-channe: xfer LDs staring from 0x000000001f32a000
|of-fsl-dma-channel e0021100.dma-channe: xfer LDs staring from 0x000000001f32a000
|of-fsl-dma-channel e0021100.dma-channe: xfer LDs staring from 0x000000001f32a000
|of-fsl-dma-channel e0021100.dma-channe: xfer LDs staring from 0x000000001f32a000
|of-fsl-dma-channel e0021100.dma-channe: xfer LDs staring from 0x000000001f32a000
|of-fsl-dma-channel e0021100.dma-channe: xfer LDs staring from 0x000000001f32a000
|of-fsl-dma-channel e0021100.dma-channe: xfer LDs staring from 0x000000001f32a000
|of-fsl-dma-channel e0021100.dma-channe: chan completed_cookie = 1
|of-fsl-dma-channel e0021100.dma-channe: link descriptor df32a000 will be recycle.
|of-fsl-dma-channel e0021100.dma-channe: chan completed_cookie = 1
|of-fsl-dma-channel e0021100.dma-channe: chan completed_cookie = 1

done. 
I have one list entry which is df32a000. According to the output that
single request gets started a couple of times what would explain why the
FIFO overruns.
Is it possible that the driver does not properly recognize that the
transfer is finished _and_ that is the last one in line? Enabling the
dma self test Kconfig option shows no error message but the number of
interrupts that have been generated differ from channel to channel,
from boot to boot.

btw: It is a MPC8544 DS with -rc5.

thanks,
 Sebastian


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