Differentiate between two e500 core (in mult-core e500)

[Kumar Gala]

On Jan 31, 2007, at 2:02 AM, vinay hegde wrote:

> Hi,
>
> Actually, what I mean is, there are two independent L1
> caches (one in first e500 core and other in second
> e500 core) in mpc8572. Now, if I am running cache
> test(POST) on mpc8572, I must somehow make sure that
> it tests both the L1 caches. Generally, earlier there
> used to be one e500 core, one L1 cache and hence cache
> test does not need to query whether it is testing L1
> of first core or L1 of second.
>
> So, how to make sure that I am testing L1 caches on
> _both_ the e500 cores?

Ok, will it sounds like just want to run your tests on both cores.   
It depends on how you are invoking your tests today.  Is it from  
bootcode? or a Linux app or driver?

- k

>> On Jan 30, 2007, at 10:58 PM, vinay hegde wrote:
>>
>>> Hi,
>>>
>>> Sorry for the repeat mail on this, I forgot to ask
>> the
>>> question;-)
>>>
>>> If anybody knows how to differentiate one e500
>> core
>>> from another (in multi-core proc's), please post a
>>> message.
>>
>> Do you mean some software ID to know which core you
>> are running on?
>>
>> If so the PIR should be used for this purpose.
>>
>> - k
>>
>>> --- vinay hegde <thisismevinay at yahoo.co.in> wrote:
>>>
>>>> Hi,
>>>>
>>>> I have a need to write a POST sort of a test to
>> test
>>>> L1 data/inst cache residing on each of the e500
>> v2
>>>> multi-core seperately (for a network hardware).
>> This
>>>> is because multicore e500 has seperate L1 caches
>> and
>>>> shared L2 cache.
>>>>
>>>> This is for mpc8572. I learnt from this list that
>>>> mpc8572 isn't out yet, but thought that
>>>> differentiating between e500 mult-cores has
>> nothing
>>>> to
>>>> do with mpc8572.
>>>>
>>>> Please let me know if you have any inputs.
>>>>
>>>> Thanks,
>>>> Vinay.
>>>>
>>>>
>>>>
>>>>
>>>
>>
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