[PATCH] lite5200b: flash definition in dts

Scott Wood scottwood at freescale.com
Fri Aug 3 02:56:10 EST 2007

On Thu, Aug 02, 2007 at 12:23:31AM -0600, Grant Likely wrote:
> On the other hand there is PCI whose control registers fall within the
> SoC range; but the memory windows absolutely do not.  If my flash
> argument holds water, then where does that leave PCI which kind of
> straddles the fence.

IMHO, PCI should be split into a bus node that sits outside the SoC, and
a control node that sits inside, with phandles between the two.


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