ppc 405 (xilinx) physical RAM not at 0
rvk
rvkisley at yahoo.com
Thu Apr 26 02:27:35 EST 2007
Wise folks, I apologize if this is a dupe, if so please send a link either in
forum or external to educate me.
I have a port coming up to a ppc 405 Xilinx board. The port-from board has
RAM at 0x0000_0000, but the new board will not have that. I have read Dave
Lynch's external article here: (http://www.linuxjournal.com/article/9362),
there is a paragraph where he describes asking forums for help and being
told NO! NO! don't do that..., I don't have a choice. The
include/asm-powerpc/ppc_asm.h header includes the tophys() and tovirt()
macros used in arch/ppc/kernel/head_4xx.S to set up the initial mapping of
KERNELBASE, and they seem hardcoded to a phys address for RAM of 0 (tophys
in the final BOOKE/else case converts by subtracting KERNELBASE from itself
basically, giving a base phys of 0). I'm worried this is the tip of the
iceberg.
Can anyone point me to patches or advice on how to get the 405 source using
a different phys RAM base?
--
View this message in context: http://www.nabble.com/ppc-405-%28xilinx%29-physical-RAM-not-at-0-tf3646549.html#a10184448
Sent from the linuxppc-embedded mailing list archive at Nabble.com.
More information about the Linuxppc-embedded
mailing list