Cache coherency question
LeoLi at freescale.com
Mon Aug 28 16:57:40 EST 2006
> -----Original Message-----
> From: linuxppc-embedded-bounces+leoli=freescale.com at ozlabs.org
> [mailto:linuxppc-embedded-bounces+leoli=freescale.com at ozlabs.org] On
> Liu Dave-r63238
> Sent: Monday, August 28, 2006 11:18 AM
> To: Martin, Tim; ppc
> Subject: RE: Cache coherency question
> > Ah. This must be the problem. I have a few PCI devices, and
> > on one of them it looked like snooping was working. I just
> > assumed the other device was setup correctly.
> Why one is looked like snooping was working, and the other device
> not working?
> > > Also, you can define the CONFIG_NOT_COHERENT_CACHE, then you are
> > > assuming The system has not hardware coherency. You need use the
> > > software to keep the cache coherency.
> > >
> > I tried this, and got compiler errors.
Which arch are you using? powerpc or ppc? CONFIG_NOT_COHERENT_CACHE
doesn't seem to be ported to powerpc arch completely.
> What is the file got compiler errors? I notice that the
> Did define CONFIG_NOT_COHERENT_CACHE.
> > I added some inline assembly dcbi/dcbf (invalidate/flush)
> > instructions to the particular code in question, and the
> > problems went away. So definitely a cache problem. As I
> > said above, defining CONFIG_NOT_COHERENT_CACHE causes
> > compiler errors, so I'm going to look into this more. I
> > suppose whatever file implements the
> > include/linux/dma-mapping.h stuff isn't BSP specific, so its
> > probably just not being compiled in? Will look into it.
> Somebody said from maillist. The bridge MV64360 seems
> having some issue about cache coherent. I don't know if it is really?
Looking from source code, there is such problem for MV64360. It's
likely that MV54360 has the same problem.
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