MontaVista 2.6 Kernel support for Xilinx ML40x

[Wade Maxfield]

  sorry! ;)  See my reply at the right location!

On 8/24/06, T Ziomek <ctz001 at email.mot.com> wrote:
>
> [top-posting fixed  :-) ]
>
>
> On Thu, 24 Aug 2006, Wade Maxfield wrote:
> >
> > On 8/24/06, Peter Ryser <peter.ryser at xilinx.com> wrote:
> >>
> >>  Wade,
> >>
> >> are you sure that you did not build your hardware with evaluation cores
> of
> >> the licenses? If you are using the evaluation licenses the hardware
> (FPGA
> >> design) will stop working after a certain amount of time and you will
> see a
> >> lock-up.
> >
> > Good question.  How long before lockup?  The only core that should be
> > licensed is the ethernet, and I know it was sysgened on a system with a
> > license.  This is the Xilinx reference design for the ml403 board.
>
> When we were using the eval version of Xilinx's 10/100 EMAC it would time-
> out after 8 hours (and the kernel would panic since our root fs was NFS-
> mounted).
>
> If your only [to-be-]licensed core is Ethernet, then I take it you're
> using
> the UARTLite, or a non-Xilinx UART?  We used Xilinx's 16550-compatible
> UART,
> which is licensed, but I never ran with the eval version of that IP block
> and so have no idea how long it will function before shutting down.



 We are doing an evaluation right now.  We have operational 8 hours 55
minutes so far and counting on the Xilinx 16550 compatible uart.  I think
that is the cause of the problem for us, but not sure so far.


Tom
> --
> A: Because it breaks the logical        |
>      flow of the message.                |   Email to user 'CTZ001'
>                                          |             at 'email.mot.com'
> Q: Why is top posting frowned upon?     |


x<>y
 A2. but only for algebraic.  RPN likes it that way.
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